diff options
| author | Allen Xu <allen.xu@freescale.com> | 2012-04-17 14:53:22 +0800 |
|---|---|---|
| committer | Frank Li <Frank.Li@freescale.com> | 2012-04-17 14:55:03 +0800 |
| commit | ecadb7589810a2bd2fcb577c346ecf31cd3a8c8a (patch) | |
| tree | 780edfa83978a97c07c0d88de160e9f1359d1a2b | |
| parent | bbda54ba846d3839c8a5240370fdee081a058f68 (diff) | |
ENGR00179804 change NAND clock source from pll2_pfd_352M to pll2_pfd_400M
Due to pll2_pfd_352M would be used for LVDS, change NAND clock source to
pll2_pfd_400M.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index a16cfc85ca28..7131578a2bdb 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -3874,7 +3874,7 @@ static int _clk_enfc_set_rate(struct clk *clk, unsigned long rate) static struct clk enfc_clk = { __INIT_CLK_DEBUG(enfc_clk) .id = 0, - .parent = &pll2_pfd_352M, + .parent = &pll2_pfd_400M, .enable_reg = MXC_CCM_CCGR2, .enable_shift = MXC_CCM_CCGRx_CG7_OFFSET, .enable = _clk_enable, |