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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-02-20 11:10:07 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-02-20 11:10:07 +0100 |
| commit | fa236141e8debca1b6f4dabca2481427a57cef31 (patch) | |
| tree | 4f406318d17f1a68a1e918828207d3de63f91b17 | |
| parent | 010a214f9009c9832ab47b20f1f09a28b242adbe (diff) | |
apalis_t30: fix 24 bpp rgb output
Activate 24 bpp RGB output.
Please not that this is just the backend configuration. For true 24 bpp
output the framebuffer as well as driver have to be configured for 24
resp. 32 bpp as well.
| -rw-r--r-- | arch/arm/mach-tegra/board-apalis_t30-panel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board-apalis_t30-panel.c b/arch/arm/mach-tegra/board-apalis_t30-panel.c index f8f0672b8eb1..d8bfbec38706 100644 --- a/arch/arm/mach-tegra/board-apalis_t30-panel.c +++ b/arch/arm/mach-tegra/board-apalis_t30-panel.c @@ -540,7 +540,7 @@ static struct tegra_dc_out apalis_t30_disp1_out = { .align = TEGRA_DC_ALIGN_MSB, .order = TEGRA_DC_ORDER_RED_BLUE, - .depth = 18, + .depth = 24, .dither = TEGRA_DC_ORDERED_DITHER, .modes = apalis_t30_panel_modes, |