diff options
author | Eric Nelson <eric.nelson@boundarydevices.com> | 2014-01-02 17:10:48 -0700 |
---|---|---|
committer | Eric Nelson <eric.nelson@boundarydevices.com> | 2014-01-02 17:10:48 -0700 |
commit | 4f9a10cb850afa07697bb3a543cf70dc7fbda2d6 (patch) | |
tree | d90a90d651ddf90f257b630d044b599e54e9f91e | |
parent | 4007673c6cbc200f1a153b403283f39e41e3423f (diff) |
sp: Add eMMC on USDHC4
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
-rw-r--r-- | arch/arm/mach-mx6/board-mx6_sp.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-mx6/pads-mx6_sp.h | 35 |
2 files changed, 49 insertions, 7 deletions
diff --git a/arch/arm/mach-mx6/board-mx6_sp.c b/arch/arm/mach-mx6/board-mx6_sp.c index 2902a75e63dd..e80f56680fad 100644 --- a/arch/arm/mach-mx6/board-mx6_sp.c +++ b/arch/arm/mach-mx6/board-mx6_sp.c @@ -85,7 +85,6 @@ #define RTC_I2C_EN IMX_GPIO_NR(2, 23) /* EIM_CS0 - active high */ #define RTC_IRQ IMX_GPIO_NR(2, 26) /* EIM_RW - active low */ -#define ST_EMMC_RESET IMX_GPIO_NR(2, 5) /* NANDF_D5 - active low */ #define ST_SD3_CD IMX_GPIO_NR(7, 0) /* SD3_DAT5 - active low */ #define ST_ECSPI1_CS1 IMX_GPIO_NR(3, 19) /* EIM_D19 - active low */ @@ -96,6 +95,8 @@ #define USB_HUB_RESET IMX_GPIO_NR(7, 12) /* GPIO_17 - active low */ +#define EMMC_RESET IMX_GPIO_NR(2, 7) /* NANDF_D7 - active low */ + #define WL_BT_RESET IMX_GPIO_NR(6, 8) /* NANDF_ALE - active low */ #define WL_BT_REG_EN IMX_GPIO_NR(6, 15) /* NANDF_CS2 - active high */ #define WL_BT_WAKE_IRQ IMX_GPIO_NR(6, 16) /* NANDF_CS3 - active low */ @@ -166,12 +167,7 @@ struct gpio mx6_init_gpios[] __initdata = { {.label = "wl_clk_req_irq", .gpio = WL_CLK_REQ_IRQ, .flags = GPIOF_DIR_IN}, /* GPIO6[9]: NANDF_WP_B - active low */ {.label = "wl_wake_irq", .gpio = WL_WAKE_IRQ, .flags = GPIOF_DIR_IN}, /* GPIO6[14]: NANDF_CS1 - active low */ - {.label = "gled", .gpio = MX6_N6L_GLED, .flags = 0}, /* J14 pin1: GPIO2 */ - {.label = "rled", .gpio = MX6_N6L_RLED, .flags = 0}, /* J14 pin3: GPIO3 */ - {.label = "drycontact", .gpio = MX6_N6L_DRYCONTACT, .flags = 0}, /* J14 pins 8/9: GPIO6 */ - {.label = "drycontact2", .gpio = MX6_N6L_DRYCONTACT2, .flags = 0}, /* J14 pins 8/9: GPIO6 */ - {.label = "volup", .gpio = MX6_N6L_VOLUP, .flags = GPIOF_DIR_IN}, /* J14 pin5: GPIO_18 */ - {.label = "voldown", .gpio = MX6_N6L_VOLDOWN, .flags = GPIOF_DIR_IN}, /* J14 pin7: GPIO_19 */ + {.label = "emmc_reset" , .gpio = EMMC_RESET, .flags = 0}, }; enum sd_pad_mode { @@ -236,6 +232,15 @@ static struct esdhc_platform_data mx6_sd3_data = { .platform_pad_change = plt_sd_pad_change, }; +static const struct esdhc_platform_data mx6_sd4_data __initconst = { + .cd_gpio = -1, + .wp_gpio = -1, + .always_present = 1, + .keep_power_at_suspend = 1, + .support_8bit = 1, + .platform_pad_change = plt_sd_pad_change, +}; + static const struct anatop_thermal_platform_data mx6_anatop_thermal_data __initconst = { .name = "anatop_thermal", @@ -588,6 +593,7 @@ static void __init mx6_board_init(void) imx6q_add_imx_uart(0, NULL); imx6q_add_imx_uart(1, NULL); imx6q_add_imx_uart(2, &mx6_arm2_uart2_data); + imx6q_add_imx_uart(3, NULL); if (!cpu_is_mx6q()) { ldb_data.ipu_id = 0; @@ -626,6 +632,7 @@ static void __init mx6_board_init(void) imx6q_add_anatop_thermal_imx(1, &mx6_anatop_thermal_data); imx6q_add_pm_imx(0, &mx6_pm_data); imx6q_add_sdhci_usdhc_imx(2, &mx6_sd3_data); + imx6q_add_sdhci_usdhc_imx(3, &mx6_sd4_data); imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata); imx6_init_usb(); imx6q_add_vpu(); diff --git a/arch/arm/mach-mx6/pads-mx6_sp.h b/arch/arm/mach-mx6/pads-mx6_sp.h index 7870b7d3c982..f06a89901cbb 100644 --- a/arch/arm/mach-mx6/pads-mx6_sp.h +++ b/arch/arm/mach-mx6/pads-mx6_sp.h @@ -23,6 +23,16 @@ #define MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ +#define MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 MX6Q_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ +#define MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 MX6Q_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ +#define MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 MX6Q_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ +#define MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 MX6Q_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ #define MX6DL_USDHC_PAD_CTRL_22KPU_40OHM_50MHZ MX6Q_USDHC_PAD_CTRL_22KPU_40OHM_50MHZ #define MX6DL_USDHC_PAD_CTRL_50MHZ MX6DL_USDHC_PAD_CTRL @@ -32,6 +42,16 @@ #define MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ +#define MX6DL_PAD_SD4_DAT4__USDHC4_DAT4 MX6DL_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ +#define MX6DL_PAD_SD4_DAT5__USDHC4_DAT5 MX6DL_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ +#define MX6DL_PAD_SD4_DAT6__USDHC4_DAT6 MX6DL_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ +#define MX6DL_PAD_SD4_DAT7__USDHC4_DAT7 MX6DL_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ #define NP(id, pin, pad_ctl) \ NEW_PAD_CTRL(MX6PAD(SD##id##_##pin##__USDHC##id##_##pin), MX6(pad_ctl)) @@ -44,6 +64,13 @@ NP(id, DAT2, pad_ctl), \ NP(id, DAT3, pad_ctl) +#define SD_PINS8(id, pad_ctl) \ + SD_PINS(id, pad_ctl), \ + NP(id, DAT4, pad_ctl), \ + NP(id, DAT5, pad_ctl), \ + NP(id, DAT6, pad_ctl), \ + NP(id, DAT7, pad_ctl) + /* Pull/keeper disabled, or with PAD_CTL_PKE to enable */ #define WEAK (PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_240ohm | PAD_CTL_SPEED_LOW) #define WEAK_IRQ (WEAK | PAD_CTL_PKE | PAD_CTL_HYS) @@ -120,6 +147,10 @@ static iomux_v3_cfg_t MX6NAME(common_pads)[] = { MX6PAD(EIM_D27__UART2_RXD), MX6PAD(EIM_D26__UART2_TXD), + /* UART4 */ + MX6PAD(KEY_COL0__UART4_TXD), + MX6PAD(KEY_ROW0__UART4_RXD), + /* USB hub reset */ NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO_7_12), WEAK), /* USB Hub Reset */ @@ -163,6 +194,10 @@ static iomux_v3_cfg_t MX6NAME(common_pads)[] = { MX6PAD(SD2_DAT2__USDHC2_DAT2), MX6PAD(SD2_DAT3__USDHC2_DAT3), + /* USDHC4 (eMMC) */ + SD_PINS8(4, USDHC_PAD_CTRL_50MHZ), + MX6PAD(NANDF_D7__GPIO_2_7), /* eMMC reset */ + /* GPIO connector (J14) */ NEW_PAD_CTRL(MX6PAD(GPIO_2__GPIO_1_2), WEAK), /* J14 pin1 - GLED */ NEW_PAD_CTRL(MX6PAD(GPIO_3__GPIO_1_3), WEAK), /* J14 pin3 - RLED */ |