diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2016-02-09 16:15:28 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2016-03-09 10:01:53 +0100 |
| commit | 2a942f3be6e5a17a1b215c126f263bbc6ea824cc (patch) | |
| tree | f4dbffe4f06e582dea668d9fe48ef7ce0ff66569 | |
| parent | f80a9b4090bcf9977dc0b6d2631281058c2d843c (diff) | |
ARM: dts: imx7d-colibri: use external Ethernet PHY clock
Add workaround for M4 NMI issue.
Set the Ethernet PHY reference clock to be generated externaly from
the i.MX 7 by default (Colibri i.MX 7 V1.1 sample batch)
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | arch/arm/boot/dts/imx7d-colibri.dts | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx7d-colibri.dts b/arch/arm/boot/dts/imx7d-colibri.dts index f2d49d270e55..0ac372c1f82c 100644 --- a/arch/arm/boot/dts/imx7d-colibri.dts +++ b/arch/arm/boot/dts/imx7d-colibri.dts @@ -12,6 +12,9 @@ #include <dt-bindings/input/input.h> #include "imx7d.dtsi" +/* define USE_ENET_OUT when the PHY clock is provided by the i.MX7 */ +/* #define USE_ENET_OUT */ + / { model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; compatible = "toradex,colibri_imx7d-eval", "toradex,colibri_imx7d", \ @@ -145,8 +148,11 @@ <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>, <&clks IMX7D_ENET1_REF_ROOT_CLK>; clock-names = "ipg", "ahb", "ptp", +#ifdef USE_ENET_OUT "enet_clk_ref", "enet_out"; - +#else + "enet_clk_ref", "no_enet_out"; +#endif assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; @@ -564,8 +570,17 @@ MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 - +#ifdef USE_ENET_OUT +#if 1 MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x40000073 +#else +/* workaround ethernet & M4 NMI issue */ + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 + MX7D_PAD_I2C1_SDA__CCM_ENET_REF_CLK1 0x40000070 +#endif +#else + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 +#endif MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 MX7D_PAD_SD2_WP__ENET1_MDC 0x3 >; |