diff options
author | Fugang Duan <b38611@freescale.com> | 2015-04-23 09:32:43 +0800 |
---|---|---|
committer | Frank Li <Frank.Li@freescale.com> | 2015-04-24 23:04:19 +0800 |
commit | 07e4deaa68e4f71de4a6cbb9c982f5da337dab7a (patch) | |
tree | a99830ff17a43605d8b829637049077a450a8be0 | |
parent | bc3d93705ebcd2dc831931841bc5906696a85f0d (diff) |
MLK-10726 ARM: dts: imx7d-sdb: correct uart6 assigned clocks
The issue is introduced by the commit:
2b640b0f16e4b6b549ae466011ab9b96778162c9
Correct uart6 assigned clock parent, otherwise the default parent clock
is 24Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
-rw-r--r-- | arch/arm/boot/dts/imx7d-sdb.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index 1e1cdfb69c64..91973adb98a7 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -869,7 +869,7 @@ &uart6 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart6>; - assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; fsl,uart-has-rtscts; status = "okay"; |