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authorSanchayan Maity <maitysanchayan@gmail.com>2015-02-03 15:15:08 +0530
committerStefan Agner <stefan.agner@toradex.com>2015-02-03 11:25:02 +0100
commitc78b5ae472e69452d5fe44c261d57c8083c59f74 (patch)
tree95eb5856a2007741bb1829b601ca0799d5e71905
parented85461161652239983971c31bdc4fc1e58a06d8 (diff)
iio: adc: vf610: use sample period of minimum 6 ADC clocksColibri_VF_LinuxImageV2.3Beta7_20150203toradex_vf_3.18
The patch changes the sample period to 6 ADC clocks instead of the earlier 2 ADC clocks. This is required as reading multiple channels simultaneously at short time intervals (< 10ms) leads to fluctuations in the internal temperature sensor readouts. Internal temperature sensor seems to require atleast 4 ADC clocks for a stable reading. Also change the formula for calculating available sampling frequencies accordingly. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
-rw-r--r--drivers/iio/adc/vf610_adc.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c
index deffcc6..4dc55f8 100644
--- a/drivers/iio/adc/vf610_adc.c
+++ b/drivers/iio/adc/vf610_adc.c
@@ -68,6 +68,9 @@
#define VF610_ADC_CLK_DIV8 0x60
#define VF610_ADC_CLK_MASK 0x60
#define VF610_ADC_ADLSMP_LONG 0x10
+#define VF610_ADC_ADSTS_SHORT 0x100
+#define VF610_ADC_ADSTS_NORMAL 0x200
+#define VF610_ADC_ADSTS_LONG 0x300
#define VF610_ADC_ADSTS_MASK 0x300
#define VF610_ADC_ADLPC_EN 0x80
#define VF610_ADC_ADHSC_EN 0x400
@@ -239,7 +242,7 @@ static inline void vf610_adc_cfg_init(struct vf610_adc *info,
adck_rate = ipg_rate / info->adc_feature.clk_div;
for (i = 0; i < VF610_SAMPLE_FREQ_CNT; i++)
info->sample_freq_avail[i] =
- adck_rate / (6 + vf610_hw_avgs[i] * (25 + 3));
+ adck_rate / (6 + vf610_hw_avgs[i] * (25 + 7));
}
static void vf610_adc_cfg_post_set(struct vf610_adc *info)
@@ -384,7 +387,13 @@ static void vf610_adc_sample_set(struct vf610_adc *info)
}
/* Use the short sample mode */
- cfg_data &= ~(VF610_ADC_ADLSMP_LONG | VF610_ADC_ADSTS_MASK);
+ cfg_data &= ~VF610_ADC_ADLSMP_LONG;
+ /*
+ * Keep sample period to atleast 6 ADC clocks. This is required
+ * for correct readings of temperature sensor when multiple channels
+ * are sampled continuously in very short intervals.
+ */
+ cfg_data |= VF610_ADC_ADSTS_NORMAL;
/* update hardware average selection */
cfg_data &= ~VF610_ADC_AVGS_MASK;