diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-01-11 23:35:52 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-01-11 23:35:52 +0100 |
| commit | 3b2bdd583750496f282d5e452da12f32e9008472 (patch) | |
| tree | 3f95c82d615860e461af2509e4f060b3cdc67084 | |
| parent | 3784b7d6322960605d082c18e2916b2839647bb3 (diff) | |
colibri_t20: fix GMI_WR_N on SODIMM pin 93 RDnWR
Looks like we mixed up the low-active buffer enable GPIOs. This fixes
GMI_WR_N on SODIMM pin 93 RDnWR curtsey Tord Andersson from Endian
Technologies AB.
| -rw-r--r-- | arch/arm/mach-tegra/board-colibri_t20-pinmux.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c index 471c2150f9c9..1383f7d55459 100644 --- a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c +++ b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c @@ -370,12 +370,12 @@ int __init colibri_t20_pinmux_init(void) gpio_direction_output(TEGRA_GPIO_PI4, 1); /* tri-stating GMI_WR_N on SODIMM pin 99 nPWE */ - gpio_request(TEGRA_GPIO_PT6, "no GMI_WR_N on 99"); - gpio_direction_output(TEGRA_GPIO_PT6, 1); + gpio_request(TEGRA_GPIO_PT5, "no GMI_WR_N on 99"); + gpio_direction_output(TEGRA_GPIO_PT5, 1); /* not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */ - gpio_request(TEGRA_GPIO_PT5, "GMI_WR_N on 93 RDnWR"); - gpio_direction_output(TEGRA_GPIO_PT5, 0); + gpio_request(TEGRA_GPIO_PT6, "GMI_WR_N on 93 RDnWR"); + gpio_direction_output(TEGRA_GPIO_PT6, 0); return 0; } |