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authorQuinn Jensen <quinn.jensen@freescale.com>2007-10-24 21:27:16 -0600
committerQuinn Jensen <quinn.jensen@freescale.com>2007-10-24 21:27:16 -0600
commit594133ef22fae0d737bd1b57352cf3f48a192c63 (patch)
tree3fc14480cfdc862ae4bbd539e16a329b3d9e3869
parent30b79f6f01481dd8c5491ef3165521fc2ad68f8c (diff)
CR ENGR00053563 Fix Sahara Issue For MX272.6.22-mx31ads-2007102503272.6.22-mx31-200710250327
Patch for CR ENGR00053563 Fix Sahara Issue For MX27 Replace dma_map_single() with direct calls to L1,L2 cache functions. Applies to linux 2.6.22 kernel on MX27 platforms. http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00053563-Fix-Sahara-Issue-For-MX27.patch
-rw-r--r--drivers/mxc/security/sahara2/include/linux_port.h21
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/mxc/security/sahara2/include/linux_port.h b/drivers/mxc/security/sahara2/include/linux_port.h
index 1fb5836..f4f356b 100644
--- a/drivers/mxc/security/sahara2/include/linux_port.h
+++ b/drivers/mxc/security/sahara2/include/linux_port.h
@@ -1665,8 +1665,11 @@ extern void v6_flush_kern_cache_all_L2(void);
*
* @return void
*/
-#define os_cache_clean_range(start,len) \
- dma_map_single(NULL, (void*)start, len, DMA_TO_DEVICE)
+#define os_cache_clean_range(start,len) \
+{ \
+ dmac_clean_range(start, (void *)((unsigned long)(start) + len)); \
+ outer_clean_range(__pa(start), __pa((unsigned long)(start) + len)); \
+}
/*!
* Invalidate a range of addresses in the cache
@@ -1676,8 +1679,11 @@ extern void v6_flush_kern_cache_all_L2(void);
*
* @return void
*/
-#define os_cache_inv_range(start,len) \
- dma_map_single(NULL, (void*)start, len, DMA_FROM_DEVICE)
+#define os_cache_inv_range(start,len) \
+{ \
+ dmac_inv_range(start, (void *)((unsigned long)(start) + len)); \
+ outer_inv_range(__pa(start), __pa((unsigned long)(start) + len)); \
+}
/*!
* Flush a range of addresses from the cache. That is, perform clean
@@ -1688,8 +1694,11 @@ extern void v6_flush_kern_cache_all_L2(void);
*
* @return void
*/
-#define os_cache_flush_range(start,len) \
- dma_map_single(NULL, (void*)start, len, DMA_BIDIRECTIONAL)
+#define os_cache_flush_range(start,len) \
+{ \
+ dmac_flush_range(start, (void *)((unsigned long)(start) + len)); \
+ outer_flush_range(__pa(start), __pa((unsigned long)(start) + len)); \
+}
/*! @} *//* cacheops */