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authorShawn Xiao <b49994@freescale.com>2015-10-19 11:54:21 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-14 11:02:11 -0600
commitf86a3b3e4aa20819cbe4e2941b2809e2be0f0420 (patch)
tree064a6d89045342b2c9e2233752436976445bc4e1
parent2657704f8580f9ce1b068e78f5c5e41213273bbb (diff)
MGS-1087 gpu: Move the GPU reserved memory to DTS file
Currently 128M reserved for GPU in all the i.MX6 boards that is requiring kernel to allocate CMA 320M. For the low end devices like 6SX and 6SL, the 320M is huge. Sometimes customer board may have very less RAM. With Kernel 4.1, there is a new feature CMA can be calculated at DTS level based on the amount queried from different module drivers.So moving the GPU memory to DTS is valid and can be configured for each board. And at the same time, also keep the option for user to configure the parameters "contiguousBase and contiguousSize" in u-boot. Signed-off-by: Shawn Xiao <b49994@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi21
-rw-r--r--arch/arm/configs/imx_v7_defconfig2
-rw-r--r--drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_probe.c5
-rw-r--r--drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c19
4 files changed, 39 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index d14f759c639f..2d7f2819c603 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -82,6 +82,20 @@
};
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x14000000>;
+ linux,cma-default;
+ };
+ };
+
soc {
busfreq {
compatible = "fsl,imx_busfreq";
@@ -93,12 +107,15 @@
interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3";
fsl,max_ddr_freq = <528000000>;
};
+
gpu@00130000 {
compatible = "fsl,imx6q-gpu";
reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
- <0x02204000 0x4000>, <0x0 0x0>;
+ <0x02204000 0x4000>, <0x0 0x0>,
+ <0x0 0x8000000>;
reg-names = "iobase_3d", "iobase_2d",
- "iobase_vg", "phys_baseaddr";
+ "iobase_vg", "phys_baseaddr",
+ "contiguous_mem";
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>,
<0 10 IRQ_TYPE_LEVEL_HIGH>,
<0 11 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index b3eb734bc5c1..5a641bfc5018 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -82,7 +82,7 @@ CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
CONFIG_DMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=320
+CONFIG_CMA_SIZE_MBYTES=0
CONFIG_IMX_WEIM=y
CONFIG_CONNECTOR=y
CONFIG_MTD=y
diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_probe.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_probe.c
index 4a29f0e776e2..8e2f57954fe2 100644
--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_probe.c
+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_probe.c
@@ -139,10 +139,7 @@ static ulong registerMemSizeDEC300 = 2 << 10;
module_param(registerMemSizeDEC300, ulong, 0644);
#endif
-#ifndef gcdDEFAULT_CONTIGUOUS_SIZE
-#define gcdDEFAULT_CONTIGUOUS_SIZE (4 << 20)
-#endif
-static ulong contiguousSize = gcdDEFAULT_CONTIGUOUS_SIZE;
+static ulong contiguousSize = 0;
module_param(contiguousSize, ulong, 0644);
static ulong contiguousBase = 0;
diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c
index dda425782db2..6655c26614eb 100644
--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c
+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c
@@ -103,6 +103,10 @@ extern int unregister_thermal_notifier(struct notifier_block *nb);
#define UNREG_THERMAL_NOTIFIER(a) unregister_thermal_notifier(a);
#endif
+#ifndef gcdDEFAULT_CONTIGUOUS_SIZE
+#define gcdDEFAULT_CONTIGUOUS_SIZE (4 << 20)
+#endif
+
static int initgpu3DMinClock = 1;
module_param(initgpu3DMinClock, int, 0644);
@@ -435,7 +439,16 @@ gckPLATFORM_AdjustParam(
Args->registerMemSizeVG = res->end - res->start + 1;
}
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,1,0)
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "contiguous_mem");
+ if (res)
+ {
+ if( Args->contiguousBase == 0 )
+ Args->contiguousBase = res->start;
+ if( Args->contiguousSize == 0 )
+ Args->contiguousSize = res->end - res->start + 1;
+ }
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
Args->contiguousBase = 0;
#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
prop = of_get_property(dn, "contiguousbase", NULL);
@@ -450,7 +463,11 @@ gckPLATFORM_AdjustParam(
}
#endif
if (Args->contiguousSize == 0)
+ {
gckOS_Print("Warning: No contiguous memory is reserverd for gpu.!\n ");
+ gckOS_Print("Warning: Will use default value(%d) for the reserved memory!\n ",gcdDEFAULT_CONTIGUOUS_SIZE);
+ Args->contiguousSize = gcdDEFAULT_CONTIGUOUS_SIZE;
+ }
Args->gpu3DMinClock = initgpu3DMinClock;