diff options
| author | Markus Pargmann <mpa@pengutronix.de> | 2014-01-17 10:07:42 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-09 21:33:51 +0800 |
| commit | 28f93d0bbe171cf0c9051f22b550890740776bbb (patch) | |
| tree | e84b6a2ce8da4bd178d1514edd4f069aa7308f1f | |
| parent | f742c22c9b1eb079e528fb2caa441ffa6a1ad960 (diff) | |
ARM: dts: imx5: use imx51-ssi
imx51-ssi and imx21-ssi are different IPs. imx51-ssi supports online
reconfiguration and needs this for correct interaction with SDMA. This
patch adds imx51-ssi before each imx21-ssi for all imx5 SoCs.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/imx50.dtsi | 7 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 10 |
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi index 7152472b191a..0c75fe3deb35 100644 --- a/arch/arm/boot/dts/imx50.dtsi +++ b/arch/arm/boot/dts/imx50.dtsi @@ -140,7 +140,9 @@ }; ssi2: ssi@50014000 { - compatible = "fsl,imx50-ssi", "fsl,imx21-ssi"; + compatible = "fsl,imx50-ssi", + "fsl,imx51-ssi", + "fsl,imx21-ssi"; reg = <0x50014000 0x4000>; interrupts = <30>; clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>; @@ -445,7 +447,8 @@ }; ssi1: ssi@63fcc000 { - compatible = "fsl,imx50-ssi", "fsl,imx21-ssi"; + compatible = "fsl,imx50-ssi", "fsl,imx51-ssi", + "fsl,imx21-ssi"; reg = <0x63fcc000 0x4000>; interrupts = <29>; clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 194866ae8d59..80615dfa2177 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -175,7 +175,9 @@ }; ssi2: ssi@50014000 { - compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + compatible = "fsl,imx53-ssi", + "fsl,imx51-ssi", + "fsl,imx21-ssi"; reg = <0x50014000 0x4000>; interrupts = <30>; clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>; @@ -594,7 +596,8 @@ }; ssi1: ssi@63fcc000 { - compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", + "fsl,imx21-ssi"; reg = <0x63fcc000 0x4000>; interrupts = <29>; clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>; @@ -621,7 +624,8 @@ }; ssi3: ssi@63fe8000 { - compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", + "fsl,imx21-ssi"; reg = <0x63fe8000 0x4000>; interrupts = <96>; clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>; |