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authorWallace Wang <r59996@freescale.com>2010-01-05 01:34:54 +0800
committerWallace Wang <r59996@freescale.com>2010-01-07 16:33:30 +0800
commit2b8c4199f4e23e784e207ec73ac781fc2fe8bc08 (patch)
tree9d376d8b371e780d4c9675d6e610c27045667f77
parent1d336b06e827f12862cba32d4d817443d5ccfb4f (diff)
ENGR00119583 MX35: Add regulators' standby control
u-boot set wrong standby contorl for regulators, while kernel doesn't set standby controls which cuase system can't wakeup from suspend mode. Signed-off-by: Wallace Wang <r59996@freescale.com>
-rw-r--r--arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c37
1 files changed, 36 insertions, 1 deletions
diff --git a/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c b/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c
index b20be8208483..eeb607d005bc 100644
--- a/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c
+++ b/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c
@@ -2,7 +2,7 @@
* mx35-3stack-pmic-mc13892.c -- i.MX35 3STACK Driver for Atlas MC13892 PMIC
*/
/*
- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -37,6 +37,30 @@
#define STANDBYSECINV_LSH 11
#define STANDBYSECINV_WID 1
+/* regulator standby mask */
+#define GEN1_STBY_MASK (1 << 1)
+#define IOHI_STBY_MASK (1 << 4)
+#define DIG_STBY_MASK (1 << 10)
+#define GEN2_STBY_MASK (1 << 13)
+#define PLL_STBY_MASK (1 << 16)
+#define USB2_STBY_MASK (1 << 19)
+
+#define GEN3_STBY_MASK (1 << 1)
+#define CAM_STBY_MASK (1 << 7)
+#define VIDEO_STBY_MASK (1 << 13)
+#define AUDIO_STBY_MASK (1 << 16)
+#define SD_STBY_MASK (1 << 19)
+
+/* 0x92412 */
+#define REG_MODE_0_ALL_MASK (GEN1_STBY_MASK | \
+ IOHI_STBY_MASK | DIG_STBY_MASK | \
+ GEN2_STBY_MASK | PLL_STBY_MASK | \
+ USB2_STBY_MASK)
+/* 0x92082 */
+#define REG_MODE_1_ALL_MASK (GEN3_STBY_MASK | \
+ CAM_STBY_MASK | VIDEO_STBY_MASK | \
+ AUDIO_STBY_MASK | SD_STBY_MASK)
+
/* CPU */
static struct regulator_consumer_supply sw1_consumers[] = {
{
@@ -308,6 +332,17 @@ static int init_mc13892(void)
value = 0x210068;
pmic_write_reg(REG_CHARGE, value, 0x018078);
+ /* enable standby controll for regulators */
+ pmic_read_reg(REG_MODE_0, &value, 0xffffff);
+ value &= ~REG_MODE_0_ALL_MASK;
+ value |= (DIG_STBY_MASK | PLL_STBY_MASK | \
+ USB2_STBY_MASK);
+ pmic_write_reg(REG_MODE_0, value, 0xffffff);
+
+ pmic_read_reg(REG_MODE_1, &value, 0xffffff);
+ value |= REG_MODE_1_ALL_MASK;
+ pmic_write_reg(REG_MODE_1, value, 0xffffff);
+
return 0;
}