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authorPeter Chen <peter.chen@freescale.com>2010-12-10 12:35:09 +0800
committerPeter Chen <peter.chen@freescale.com>2010-12-10 15:16:25 +0800
commit92be7f9821a293fb4dc0932263af946d7b81ff89 (patch)
treed261484c7ca4e70bc27e74dfd42aaad81637eab2
parent51751fe784129967315ebef2432f082cd3bdddd4 (diff)
ENGR00136195 MX28-MSL: fix AHB clock divider issue
Also fix the suspend/resume issue when CPU running @261818000Hz Signed-off-by: Peter Chen <peter.chen@freescale.com>
-rw-r--r--arch/arm/mach-mx28/clock.c2
-rw-r--r--arch/arm/mach-mx28/pm.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-mx28/clock.c b/arch/arm/mach-mx28/clock.c
index b02a69461260..9797d1f650d9 100644
--- a/arch/arm/mach-mx28/clock.c
+++ b/arch/arm/mach-mx28/clock.c
@@ -772,7 +772,7 @@ static unsigned long h_round_rate(struct clk *clk, unsigned long rate)
div = root_rate / rate;
if ((div == 0) || (div >= 0x20))
return root_rate;
- if (frac_rate == 0)
+ if (frac_rate < (rate / 2))
return rate;
else
return root_rate / (div + 1);
diff --git a/arch/arm/mach-mx28/pm.c b/arch/arm/mach-mx28/pm.c
index c6490d0e3e6d..3dcbb1e889c5 100644
--- a/arch/arm/mach-mx28/pm.c
+++ b/arch/arm/mach-mx28/pm.c
@@ -115,7 +115,8 @@ static inline void do_standby(void)
clk_set_parent(cpu_clk, osc_clk);
} else
pr_err("fail to get cpu clk\n");
-
+ if (cpu_rate == 261818000)
+ clk_set_rate(hbus_clk, 8727267);
local_fiq_disable();
__raw_writel(BM_POWER_CTRL_ENIRQ_PSWITCH,