diff options
| author | Sandor Yu <R01008@freescale.com> | 2012-01-09 21:23:33 +0800 |
|---|---|---|
| committer | Frank Li <Frank.Li@freescale.com> | 2012-01-11 09:19:34 +0800 |
| commit | 953fe3a3f6c29a71820f31c02b1c06e0ab9806e2 (patch) | |
| tree | 3e0224e099ec4232b3e91572c07b5be60a7199f3 | |
| parent | c9fe1a5afc6fce458e833b26d4f0e3dc612fac37 (diff) | |
ENGR00171444 HDMI: Change video mode system will hang.
There are two couples register for HDMI PHY interrupt/mask:
HDMI_FC_INT2, HDMI_FC_MASK2 and HDMI_IH_FC_STAT2, HDMI_IH_MUTE_FC_STAT2.
The register can not mixed use it, otherwise the interrupt will missing
and not clean.
Mask interrupt with HDMI_IH_MUTE_FC_STAT2 so check interrupt
should use register HDMI_IH_FC_STAT2.
Signed-off-by: Sandor Yu <R01008@freescale.com>
| -rw-r--r-- | drivers/video/mxc_hdmi.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c index 24caf02f3217..3c9a52685d4d 100644 --- a/drivers/video/mxc_hdmi.c +++ b/drivers/video/mxc_hdmi.c @@ -1791,7 +1791,7 @@ static void hotplug_worker(struct work_struct *work) phy_int_mask &= ~HDMI_PHY_HPD; hdmi_writeb(phy_int_mask, HDMI_PHY_MASK0); - if (hdmi_readb(HDMI_FC_INT2) & HDMI_FC_INT2_OVERFLOW_MASK) + if (hdmi_readb(HDMI_IH_FC_STAT2) & HDMI_IH_FC_STAT2_OVERFLOW_MASK) mxc_hdmi_clear_overflow(); /* We keep the iahb clock enabled only if we are plugged in. */ @@ -1822,7 +1822,8 @@ static irqreturn_t mxc_hdmi_hotplug(int irq, void *data) */ ret = hdmi_irq_disable(irq); if (ret == IRQ_DISABLE_FAIL) { - if (hdmi_readb(HDMI_FC_INT2) & HDMI_FC_INT2_OVERFLOW_MASK) { + if (hdmi_readb(HDMI_IH_FC_STAT2) & + HDMI_IH_FC_STAT2_OVERFLOW_MASK) { mxc_hdmi_clear_overflow(); /* clear irq status */ |