diff options
| author | Anson Huang <b20788@freescale.com> | 2012-02-16 18:13:38 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2012-02-17 12:34:17 +0800 |
| commit | b4fb01137801bb2c53f8dc916a85bd262c096650 (patch) | |
| tree | ae2d5a6d64f6621c0424ce74ea26e978aad6d86d | |
| parent | d021a594e80da8be02e779a2db785ae5818fb785 (diff) | |
ENGR00174630 [MX6]Disable GPT serial clock
Currently we use 24MHz clock as GPT's clock
source, serial clock can be disabled, it sourced
from high freq clock, gating it can save ~8mA @VDDSOC.
Signed-off-by: Anson Huang <b20788@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index b68bda680ff1..9a4faa105cba 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5259,7 +5259,11 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, if (mx6q_revision() == IMX_CHIP_REVISION_1_0) { gpt_clk[0].parent = &ipg_perclk; gpt_clk[0].get_rate = NULL; - } + } else { + /* Here we use OSC 24M as GPT's clock source, no need to + enable gpt serial clock*/ + gpt_clk[0].secondary = NULL; + } base = ioremap(GPT_BASE_ADDR, SZ_4K); mxc_timer_init(&gpt_clk[0], base, MXC_INT_GPT); |