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authorRyan QIAN <b32804@freescale.com>2012-02-13 09:38:16 +0800
committerRyan QIAN <b32804@freescale.com>2012-02-13 10:21:12 +0800
commite90a05241fbec7d6559f30bb84d6f2e95a84a8d9 (patch)
tree1f90ebc963604f89269a17d83d57d1c6dca032b0
parent01266e2ea223b2e2bc82f98803e440cf44d4299f (diff)
ENGR00174295-02:[MX6]USDHC: ddr mode is masked on slots with no 1.8v support.
- check ocr_avail_sd & MMC_VDD_165_195 before set S18R bit to check whether the host is support 1.8v support. Signed-off-by: Ryan QIAN <b32804@freescale.com>
-rw-r--r--drivers/mmc/core/sd.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 9dafabbfa431..b7d8e369b215 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -733,8 +733,9 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr)
* If the host supports one of UHS-I modes, request the card
* to switch to 1.8V signaling level.
*/
- if (host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
+ if ((host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))
+ && (host->ocr_avail_sd & MMC_VDD_165_195))
ocr |= SD_OCR_S18R;
/* If the host can supply more than 150mA, XPC should be set to 1. */