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authorBai Ping <b51503@freescale.com>2015-06-16 02:00:27 +0800
committerBai Ping <b51503@freescale.com>2015-06-16 02:56:51 +0800
commitb16930c52cb512f4d53dd222715a65aa530cc6fe (patch)
treea323f50f351443c609f7841e4d6682fb295a6597
parent08c92bade09d7b0e0864a3c2362dc5737b195e1c (diff)
MLK-11114 ARM: imx6: disable double linefill feature on 6QP
With L2 double linefill enabled, the stress reboot test failure is met on USB(MLK10738) or SD3.0(MLK11072). By disabling L2 double line fill, the stress reboot can pass. Note we are still investigating on this issue to find the evidence how these issues are corelated with L2 double line fill Signed-off-by: Bai Ping <b51503@freescale.com>
-rw-r--r--arch/arm/mach-imx/system.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index a428edf37268..49d23b29b03c 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -170,6 +170,13 @@ void __init imx_init_l2cache(void)
if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310)
&& ((cache_id & L2X0_CACHE_ID_RTL_MASK) < L2X0_CACHE_ID_RTL_R3P2))
val &= ~(1 << 30);
+
+ /* To 6DQP, double linefill leads to system unstable. Disable
+ * double linefill on these platform.
+ */
+ if (cpu_is_imx6q() || imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
+ val &= ~(1 << 30);
+
writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);