diff options
| author | Jinyoung Park <jinyoungp@nvidia.com> | 2012-04-25 15:21:42 +0900 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-05-07 16:13:32 -0700 |
| commit | 4bcf4d1cb69470362fa2cbb7691d016513fa8e4d (patch) | |
| tree | 6a74263a75c39e81025326348ed6967cfc0c3af1 | |
| parent | bc4ec67309cf4c4bfbf83dec88d76ca641113135 (diff) | |
mfd: max77663: Unmask EN0 rising interrupt
Unmasked EN0 rising interrupt to generate fast PMU_INT by
EN0(POWER_KEY).
Bug 930883
Change-Id: I9a3d8c4f564e83deea86fbd3d05f14933a0b0f65
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/98665
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
| -rw-r--r-- | drivers/mfd/max77663-core.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mfd/max77663-core.c b/drivers/mfd/max77663-core.c index ff47cb123d0d..dbd4fff37e75 100644 --- a/drivers/mfd/max77663-core.c +++ b/drivers/mfd/max77663-core.c @@ -118,6 +118,8 @@ #define ONOFF_SLP_LPM_MASK (1 << 5) +#define ONOFF_IRQ_EN0_RISING (1 << 3) + enum { CACHE_IRQ_LBT, CACHE_IRQ_SD, @@ -1132,6 +1134,10 @@ static int max77663_irq_init(struct max77663_chip *chip) max77663_write(chip->dev, MAX77663_REG_LBT_IRQ_MASK, &chip->cache_irq_mask[CACHE_IRQ_LBT], 1, 0); + chip->cache_irq_mask[CACHE_IRQ_ONOFF] &= ~ONOFF_IRQ_EN0_RISING; + max77663_write(chip->dev, MAX77663_REG_ONOFF_IRQ_MASK, + &chip->cache_irq_mask[CACHE_IRQ_ONOFF], 1, 0); + return 0; } |