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authorKirill Artamonov <kartamonov@nvidia.com>2012-08-21 15:02:22 +0300
committerSimone Willett <swillett@nvidia.com>2012-08-28 12:38:02 -0700
commit9b55075dfad2224545aef164f63869453face3fd (patch)
treeadcb9110388382adbf9562d106b5076e3f05e6f9
parenta4e44614a5bae9e714ac99c43a6085194edb3c21 (diff)
ARM: tegra: enable errata 727915 for Tegra3
By-way maintenance doesn't reliably work with enabled lp2_in_idle on Tegra3 platform which uses R3P1_50 revision of pl310. Enable errata 727915 for Tegra3 to avoid system hang. Change-Id: Ia296c1d5b35b8f28353c15d1e4622686bc7d3beb Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-on: http://git-master/r/127225 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index f4f4d58452ed..e90ff587cc44 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -67,6 +67,7 @@ config ARCH_TEGRA_3x_SOC
select CPA
select ARCH_HAS_SUSPEND_PAGETABLE
select NVMAP_CACHE_MAINT_BY_SET_WAYS
+ select PL310_ERRATA_727915
help
Support for NVIDIA Tegra 3 family of SoCs, based upon the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller