diff options
| author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2012-05-04 19:02:04 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-05-14 13:29:13 -0700 |
| commit | ccfe6a3b2eed40f210a5d5eed9205ac10fdef19c (patch) | |
| tree | 877db0da2e9f9a46ffed7edf1478460e8f6e56f2 | |
| parent | fa86fff2c8ce7efc0dc66c74bec347f3c513fe8d (diff) | |
arm: tegra: sdhci: Define ddr50 clock limit
Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.
Bug 967719
Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/sdhci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/sdhci.h b/arch/arm/mach-tegra/include/mach/sdhci.h index b48a92887070..5dc8cd2ddf76 100644 --- a/arch/arm/mach-tegra/include/mach/sdhci.h +++ b/arch/arm/mach-tegra/include/mach/sdhci.h @@ -28,6 +28,7 @@ struct tegra_sdhci_platform_data { int pm_flags; int pm_caps; unsigned int max_clk_limit; + unsigned int ddr_clk_limit; unsigned int tap_delay; struct mmc_platform_data mmc_data; }; |