diff options
| author | Mohit Kataria <mkataria@nvidia.com> | 2012-05-31 10:30:28 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-06-01 13:07:08 -0700 |
| commit | e1d8ccd5570853c102c17089d6f1aff37bae42bd (patch) | |
| tree | f40faf65067b4b99cfe619caddfa7bcc04781533 | |
| parent | 9d210f0a1b9de662c19e7d760802898702997091 (diff) | |
ARM: Tegra: P1852: changed pad strengths
changed pad strengths to the values provided
by syseng.
Bug 978870
Change-Id: I23afc8235065ce8ab950dc92dc40e7df5f835989
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/105578
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board-p1852-pinmux.c | 53 |
1 files changed, 51 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-p1852-pinmux.c b/arch/arm/mach-tegra/board-p1852-pinmux.c index 1503c80c8269..9133c7daa972 100644 --- a/arch/arm/mach-tegra/board-p1852-pinmux.c +++ b/arch/arm/mach-tegra/board-p1852-pinmux.c @@ -63,14 +63,21 @@ /* !!!FIXME!!!! Update drive strength with characterized value */ static __initdata struct tegra_drive_pingroup_config p1852_drive_pinmux[] = { - SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + /* ATC1 CFG */ + SET_DRIVE(AT1, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* ATC2 CFG */ + SET_DRIVE(AT2, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* ATC3 CFG */ + SET_DRIVE(AT3, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* ATC4 CFG */ + SET_DRIVE(AT4, DISABLE, DISABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), /* All I2C pins are driven to maximum drive strength */ /* GEN1 I2C */ SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), /* GEN2 I2C */ - SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 12, 30, FASTEST, FASTEST), /* DDC I2C */ SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), @@ -83,6 +90,48 @@ static __initdata struct tegra_drive_pingroup_config p1852_drive_pinmux[] = { SET_DRIVE(GMF, DISABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), SET_DRIVE(GMG, DISABLE, ENABLE, DIV_1, 15, 6, SLOWEST, SLOWEST), SET_DRIVE(GMH, DISABLE, ENABLE, DIV_1, 12, 6, SLOWEST, SLOWEST), + + /* LCD */ + SET_DRIVE(LCD1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(LCD2, DISABLE, ENABLE, DIV_1, 2, 2, FASTEST, FASTEST), + + /* DAP2 */ + SET_DRIVE(DAP2, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* DAP4 */ + SET_DRIVE(DAP4, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* DBG */ + SET_DRIVE(DBG, ENABLE, ENABLE, DIV_1, 20, 0, SLOWEST, SLOWEST), + /* SPI */ + SET_DRIVE(SPI, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* UAA */ + SET_DRIVE(UAA, DISABLE, DISABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* UART2 */ + SET_DRIVE(UART2, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* UART3 */ + SET_DRIVE(UART3, ENABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* GME */ + SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 1, 4, SLOWEST, SLOWEST), + /* GMF */ + SET_DRIVE(GMF, DISABLE, ENABLE, DIV_1, 0, 0, SLOWEST, SLOWEST), + /* GMG */ + SET_DRIVE(GMG, DISABLE, ENABLE, DIV_1, 3, 0, SLOWEST, SLOWEST), + /* GMH */ + SET_DRIVE(GMH, DISABLE, ENABLE, DIV_1, 0, 12, SLOWEST, SLOWEST), + + /* I2S/TDM */ +#ifdef CONFIG_TEGRA_MODS + SET_DRIVE(DAP1, ENABLE, ENABLE, DIV_1, 20, 20, SLOWEST, SLOWEST), + SET_DRIVE(DAP3, ENABLE, ENABLE, DIV_1, 20, 20, SLOWEST, SLOWEST), +#else + SET_DRIVE(DAP1, ENABLE, ENABLE, DIV_1, 3, 3, SLOWEST, SLOWEST), + SET_DRIVE(DAP3, ENABLE, ENABLE, DIV_1, 3, 3, SLOWEST, SLOWEST), +#endif + + /* SPI */ + SET_DRIVE(UAD, DISABLE, ENABLE, DIV_1, 4, 1, SLOWEST, SLOWEST), + SET_DRIVE(UAB, DISABLE, ENABLE, DIV_1, 4, 1, SLOWEST, SLOWEST), + SET_DRIVE(SDIO3, DISABLE, ENABLE, DIV_8, 4, 1, FASTEST, FASTEST), + }; #define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io) \ |