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author | Scott Williams <scwilliams@nvidia.com> | 2011-08-03 19:21:48 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:01 -0800 |
commit | e6cb97db16e4eed8b56be29b0a7035866aa90d98 (patch) | |
tree | 7fb914bdf3fa86046178921c1e60a3fb2972e467 | |
parent | 68437fa5d8cf810c58643b364f906cb7ae29561f (diff) |
ARM: tegra: power: Clear cache/TLB forwarding when exiting SMP
When exiting SMP coherency, clear cache and TLB operation forwarding.
Change-Id: Id91331b60eb40e47591fb0282820e31b14e027d5
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R4d7697d029fa1b9d30ff612fad940f1c65b3b376
-rw-r--r-- | arch/arm/mach-tegra/sleep.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 02ab870edbbe..947d4d8867dd 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -81,7 +81,7 @@ /* Macro to exit SMP coherency. */ .macro exit_smp, tmp1, tmp2 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR - bic \tmp1, \tmp1, #(1<<6) @ clear ACTLR.SMP + bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR isb cpu_id \tmp1 |