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authorCaesar Wang <wxt@rock-chips.com>2015-07-06 11:37:23 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-09-21 10:05:45 -0700
commit77798915750db46f10bb449e1625d6368ea42e25 (patch)
tree2656043a2bc16a4aca5647037ecfafddd8fae53a
parentd3b428f0361d6dcbe7c6665ae0a824517a0b1ca9 (diff)
ARM: rockchip: fix broken build
commit cb8cc37f4d38d96552f2c52deb15e511cdacf906 upstream. The following was seen in branch[0] build. arch/arm/mach-rockchip/platsmp.c:154:23: error: 'rockchip_secondary_startup' undeclared (first use in this function) branch[0]: git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git v4.3-armsoc/soc The broken build is caused by the commit fe4407c0dc58 ("ARM: rockchip: fix the CPU soft reset"). Signed-off-by: Caesar Wang <wxt@rock-chips.com> The breakage was a result of it being wrongly merged in my branch with the cache invalidation rework from Russell 02b4e2756e01c ("ARM: v7 setup function should invalidate L1 cache"). Signed-off-by: Heiko Stuebner <heiko@sntech.de> Cc: Willy Tarreau <w@1wt.eu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/arm/mach-rockchip/platsmp.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 58ca50104a14..611a5f96d3ca 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -152,8 +152,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu,
* */
mdelay(1); /* ensure the cpus other than cpu0 to startup */
- writel(virt_to_phys(rockchip_secondary_startup),
- sram_base_addr + 8);
+ writel(virt_to_phys(secondary_startup), sram_base_addr + 8);
writel(0xDEADBEAF, sram_base_addr + 4);
dsb_sev();
}