ARM: tegra: pinmux: Prevent access to uninitialized pin groups

There is no guarantee that every element in the pin group array
will be used (i.e., initialized) for a particular SOC. Prevent
access to pin group array elements that are not initialized.

Change-Id: I90ea3616f8508b12ffe4a7daf9ff4b2bac057075
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/50059
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

1 files changed, 18 insertions, 18 deletions

diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index 9b5b4d00a583..04ac48d4c5d7 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -304,7 +304,7 @@ static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config)
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].mux_reg < 0)
+	if (pingroups[pg].mux_reg <= 0)
 		return -EINVAL;
 
 	if (func == TEGRA_MUX_INVALID) {
@@ -378,7 +378,7 @@ int tegra_pinmux_get_func(enum tegra_pingroup pg)
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].mux_reg < 0)
+	if (pingroups[pg].mux_reg <= 0)
 		return -EINVAL;
 
 	spin_lock_irqsave(&mux_lock, flags);
@@ -400,7 +400,7 @@ int tegra_pinmux_set_tristate(enum tegra_pingroup pg,
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].tri_reg < 0)
+	if (pingroups[pg].tri_reg <= 0)
 		return -EINVAL;
 
 	spin_lock_irqsave(&mux_lock, flags);
@@ -426,7 +426,7 @@ static int tegra_pinmux_set_lock(enum tegra_pingroup pg,
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].mux_reg < 0)
+	if (pingroups[pg].mux_reg <= 0)
 		return -EINVAL;
 
 	if ((lock == TEGRA_PIN_LOCK_DEFAULT) || (pingroups[pg].lock_bit < 0))
@@ -454,7 +454,7 @@ static int tegra_pinmux_set_od(enum tegra_pingroup pg,
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].mux_reg < 0)
+	if (pingroups[pg].mux_reg <= 0)
 		return -EINVAL;
 
 	if ((od == TEGRA_PIN_OD_DEFAULT) || (pingroups[pg].od_bit < 0))
@@ -483,7 +483,7 @@ static int tegra_pinmux_set_ioreset(enum tegra_pingroup pg,
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].mux_reg < 0)
+	if (pingroups[pg].mux_reg <= 0)
 		return -EINVAL;
 
 	if ((ioreset == TEGRA_PIN_IO_RESET_DEFAULT) || (pingroups[pg].ioreset_bit < 0))
@@ -513,7 +513,7 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg,
 	if (pg < 0 || pg >=  TEGRA_MAX_PINGROUP)
 		return -ERANGE;
 
-	if (pingroups[pg].pupd_reg < 0)
+	if (pingroups[pg].pupd_reg <= 0)
 		return -EINVAL;
 
 	if (pupd != TEGRA_PUPD_NORMAL &&
@@ -547,21 +547,21 @@ static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *con
 #endif
 	int err;
 
-	if (pingroups[pingroup].mux_reg >= 0) {
+	if (pingroups[pingroup].mux_reg > 0) {
 		err = tegra_pinmux_set_func(config);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s func to %s: %d\n",
 			       pingroup_name(pingroup), func_name(func), err);
 	}
 
-	if (pingroups[pingroup].pupd_reg >= 0) {
+	if (pingroups[pingroup].pupd_reg > 0) {
 		err = tegra_pinmux_set_pullupdown(pingroup, pupd);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s pullupdown to %s: %d\n",
 			       pingroup_name(pingroup), pupd_name(pupd), err);
 	}
 
-	if (pingroups[pingroup].tri_reg >= 0) {
+	if (pingroups[pingroup].tri_reg > 0) {
 		err = tegra_pinmux_set_tristate(pingroup, tristate);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s tristate to %s: %d\n",
@@ -569,21 +569,21 @@ static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *con
 	}
 
 #if !defined(CONFIG_ARCH_TEGRA_2x_SOC)
-	if (pingroups[pingroup].mux_reg >= 0) {
+	if (pingroups[pingroup].mux_reg > 0) {
 		err = tegra_pinmux_set_lock(pingroup, lock);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s lock to %s: %d\n",
 			       pingroup_name(pingroup), lock_name(func), err);
 	}
 
-	if (pingroups[pingroup].mux_reg >= 0) {
+	if (pingroups[pingroup].mux_reg > 0) {
 		err = tegra_pinmux_set_od(pingroup, od);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s od to %s: %d\n",
 			       pingroup_name(pingroup), od_name(func), err);
 	}
 
-	if (pingroups[pingroup].mux_reg >= 0) {
+	if (pingroups[pingroup].mux_reg > 0) {
 		err = tegra_pinmux_set_ioreset(pingroup, ioreset);
 		if (err < 0)
 			pr_err("pinmux: can't set pingroup %s ioreset to %s: %d\n",
@@ -916,7 +916,7 @@ void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *conf
 
 	for (i = 0; i < len; i++) {
 		pingroup = config[i].pingroup;
-		if (pingroups[pingroup].tri_reg >= 0) {
+		if (pingroups[pingroup].tri_reg > 0) {
 			err = tegra_pinmux_set_tristate(pingroup, tristate);
 			if (err < 0)
 				pr_err("pinmux: can't set pingroup %s tristate"
@@ -935,7 +935,7 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
 
 	for (i = 0; i < len; i++) {
 		pingroup = config[i].pingroup;
-		if (pingroups[pingroup].pupd_reg >= 0) {
+		if (pingroups[pingroup].pupd_reg > 0) {
 			err = tegra_pinmux_set_pullupdown(pingroup, pupd);
 			if (err < 0)
 				pr_err("pinmux: can't set pingroup %s pullupdown"
@@ -999,7 +999,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused)
 		len = strlen(pingroups[i].name);
 		dbg_pad_field(s, 15 - len);
 
-		if (pingroups[i].mux_reg < 0) {
+		if (pingroups[i].mux_reg <= 0) {
 			seq_printf(s, "TEGRA_MUX_NONE");
 			len = strlen("NONE");
 		} else {
@@ -1030,7 +1030,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused)
 			dbg_pad_field(s, 6 - len);
 		}
 #endif
-		if (pingroups[i].pupd_reg < 0) {
+		if (pingroups[i].pupd_reg <= 0) {
 			seq_printf(s, "TEGRA_PUPD_NORMAL");
 			len = strlen("NORMAL");
 		} else {
@@ -1041,7 +1041,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused)
 		}
 		dbg_pad_field(s, 9 - len);
 
-		if (pingroups[i].tri_reg < 0) {
+		if (pingroups[i].tri_reg <= 0) {
 			seq_printf(s, "TEGRA_TRI_NORMAL");
 		} else {
 			tri = (pg_readl(pingroups[i].tri_reg) >>