diff options
| author | Luke Huang <lhuang@nvidia.com> | 2011-08-22 19:33:59 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-08-31 17:42:00 -0700 |
| commit | d5e33d553165133d8893b1380b51668b54196740 (patch) | |
| tree | c7eb18f31704590334b940d2c51565ac620c03fc | |
| parent | 52c7a3045e5c65bd00d7585709e6b75e282d9a4c (diff) | |
arm: tegra: increase delay after disabling pll
Add delay after switching the clock source for sclk
Reviewed-on: http://git-master/r/48603
(cherry picked from commit 523934da7227984d05597bac8a9dcd533de2f2b4)
Change-Id: I36c399d95a1f7348b61d01843997fd4f54aa85bd
Reviewed-on: http://git-master/r/49725
Reviewed-by: Luke Huang <lhuang@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_save.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra3_save.S b/arch/arm/mach-tegra/tegra3_save.S index 26c35f03c8df..a5e5aabcc8a0 100644 --- a/arch/arm/mach-tegra/tegra3_save.S +++ b/arch/arm/mach-tegra/tegra3_save.S @@ -571,10 +571,11 @@ powerdown_l2_done: ldr r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT] orr r0, r0, #MSELECT_CLKM str r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT] + ldr r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT] - /* 2 us delay between changing sclk and disabling PLLs */ + /* 5 us delay between changing sclk and disabling PLLs */ wait_for_us r1, r7, r9 - add r1, r1, #2 + add r1, r1, #5 wait_until r1, r7, r9 /* switch to CLKS */ |