arm: tegra: Enable MC early ACK and scoreboard

Bug 791803

Original-Change-Id: I25be461cccd6e14618d8b43fd0738e9abfbe4432
Reviewed-on: http://git-master/r/23584
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I6bb5dcfbf48323919529c6271ea7696ecc413bb2

5 files changed, 42 insertions, 5 deletions

diff --git a/arch/arm/mach-tegra/common-t3.c b/arch/arm/mach-tegra/common-t3.c
index b2b9a0b1d9e7..d5393002b55f 100644
--- a/arch/arm/mach-tegra/common-t3.c
+++ b/arch/arm/mach-tegra/common-t3.c
@@ -28,6 +28,8 @@
 #include <mach/iomap.h>
 #include <mach/irqs.h>
 
+#include "tegra3_emc.h"
+
 #define MC_INT_STATUS			0x0
 #define MC_INT_MASK			0x4
 #define MC_INT_DECERR_EMEM		(1<<6)
@@ -185,12 +187,21 @@ out:
 
 void __init tegra_mc_init(void)
 {
+	void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE);
+	u32 reg;
+
+	reg = 0x0A7F1010;
+	writel(reg, mc + MC_RESERVED_RSV);
+
+	reg = readl(mc + MC_EMEM_ARB_OVERRIDE);
+	reg |= 3;
+	writel(reg, mc + MC_EMEM_ARB_OVERRIDE);
+
 	if (request_irq(INT_MC_GENERAL, tegra_mc_error_isr, 0,
 			"mc_status", NULL)) {
 		pr_err("%s: unable to register MC error interrupt\n", __func__);
 	} else {
-		void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE);
-		u32 reg = MC_INT_DECERR_EMEM | MC_INT_SECURITY_VIOLATION |
+		reg = MC_INT_DECERR_EMEM | MC_INT_SECURITY_VIOLATION |
 				MC_INT_INVALID_SMMU_PAGE;
 		writel(reg, mc + MC_INT_MASK);
 	}
diff --git a/arch/arm/mach-tegra/power.h b/arch/arm/mach-tegra/power.h
index 3812100f2dd8..49dc806c3bb9 100644
--- a/arch/arm/mach-tegra/power.h
+++ b/arch/arm/mach-tegra/power.h
@@ -146,7 +146,7 @@ void tegra_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
 void tegra_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
 	struct cpuidle_state *state);
 
-#if defined(CONFIG_TEGRA_AUTO_HOTPLUG) && defined(CONFIG_ARCH_TEGRA_3x_SOC)
+#if defined(CONFIG_TEGRA_AUTO_HOTPLUG) && !defined(CONFIG_ARCH_TEGRA_2x_SOC)
 int tegra_auto_hotplug_init(void);
 void tegra_auto_hotplug_exit(void);
 void tegra_auto_hotplug_governor(unsigned int cpu_freq);
@@ -176,6 +176,8 @@ int tegra_cpudile_init_soc(void);
 static inline bool tegra_lp2_is_allowed(struct cpuidle_device *dev,
 	struct cpuidle_state *state)
 { return true; }
+#define tegra_lp0_suspend_mc() do {} while (0)
+#define tegra_lp0_resume_mc() do {} while (0)
 #else
 #define INSTRUMENT_CLUSTER_SWITCH 1	/* Should be zero for shipping code */
 #define DEBUG_CLUSTER_SWITCH 1		/* Should be zero for shipping code */
@@ -200,6 +202,8 @@ static inline int tegra_cpudile_init_soc(void)
 { return 0; }
 bool tegra_lp2_is_allowed(struct cpuidle_device *dev,
 	struct cpuidle_state *state);
+void tegra_lp0_suspend_mc(void);
+void tegra_lp0_resume_mc(void);
 #endif
 #if DEBUG_CLUSTER_SWITCH
 extern unsigned int tegra_cluster_debug;
diff --git a/arch/arm/mach-tegra/suspend-t3.c b/arch/arm/mach-tegra/suspend-t3.c
index 66ef21076c0b..90fb6455430a 100644
--- a/arch/arm/mach-tegra/suspend-t3.c
+++ b/arch/arm/mach-tegra/suspend-t3.c
@@ -36,7 +36,7 @@
 #include "clock.h"
 #include "gpio-names.h"
 #include "power.h"
-
+#include "tegra3_emc.h"
 
 #define CAR_CCLK_BURST_POLICY \
 	(IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x20)
@@ -409,3 +409,20 @@ int tegra_wake_to_irq(int wake)
 
 	return tegra_wake_event_irq[wake];
 }
+
+static u32 mc_reserved_rsv;
+static u32 mc_emem_arb_override;
+
+void tegra_lp0_suspend_mc(void)
+{
+	void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE);
+	mc_reserved_rsv = readl(mc + MC_RESERVED_RSV);
+	mc_emem_arb_override = readl(mc + MC_EMEM_ARB_OVERRIDE);
+}
+
+void tegra_lp0_resume_mc(void)
+{
+	void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE);
+	writel(mc_reserved_rsv, mc + MC_RESERVED_RSV);
+	writel(mc_emem_arb_override, mc + MC_EMEM_ARB_OVERRIDE);
+}
diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c
index 5336e9b1a851..d894a34dddb8 100644
--- a/arch/arm/mach-tegra/suspend.c
+++ b/arch/arm/mach-tegra/suspend.c
@@ -602,6 +602,7 @@ void tegra_suspend_dram(bool do_lp0)
 
 		tegra_set_lp0_wake_pads(pdata->wake_enb, pdata->wake_high,
 			pdata->wake_any);
+		tegra_lp0_suspend_mc();
 	}
 
 	suspend_cpu_complex();
@@ -627,8 +628,10 @@ void tegra_suspend_dram(bool do_lp0)
 					    cpu, tegra_wfi_fail_count[cpu]);
 		}
 	}
-	else
+	else {
 		tegra_cpu_reset_handler_enable();
+		tegra_lp0_resume_mc();
+	}
 
 	restore_cpu_complex();
 
diff --git a/arch/arm/mach-tegra/tegra3_emc.h b/arch/arm/mach-tegra/tegra3_emc.h
index f92d2547e861..c55214e95ebd 100644
--- a/arch/arm/mach-tegra/tegra3_emc.h
+++ b/arch/arm/mach-tegra/tegra3_emc.h
@@ -225,5 +225,7 @@ enum {
 #define MC_EMEM_ARB_MISC0			0xd8
 #define MC_EMEM_ARB_MISC0_EMC_SAME_FREQ		(0x1 << 27)
 #define MC_EMEM_ARB_RING1_THROTTLE		0xe0
+#define MC_EMEM_ARB_OVERRIDE			0xe8
+#define MC_RESERVED_RSV				0x3fc
 
 #endif