diff options
| author | Richard Zhu <Richard.Zhu@freescale.com> | 2015-03-16 10:21:39 +0800 |
|---|---|---|
| committer | Richard Zhu <Richard.Zhu@freescale.com> | 2015-03-19 09:06:04 +0800 |
| commit | c8b88cd2ec6681dcef4c72be7adff9f0ed6721e4 (patch) | |
| tree | 30c56d27d88a516cf9b2cf924c89cea15175c58c | |
| parent | 899414fc9ed0768244c9d877269712a823e3cfe8 (diff) | |
MLK-10422 pci: designware: do not switch the mem view
Do not switch the mem view when the imx pcie ep/rc
validation system is enabled.
Otherwise, the RC wouldn't access the mem of the ep
device in the imx pcie ep/rc validation system.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit aeab51838317e0843a021b2e8426f942b97b01a8)
| -rw-r--r-- | drivers/pci/host/pcie-designware.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 3edd94daa3a7..f06e8f035261 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -678,7 +678,9 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, dw_pcie_prog_viewport_cfg0(pp, busdev); ret = dw_pcie_cfg_read(pp->va_cfg0_base + address, where, size, val); - dw_pcie_prog_viewport_mem_outbound(pp); + if (!IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS) + && !IS_ENABLED(CONFIG_RC_MODE_IN_EP_RC_SYS)) + dw_pcie_prog_viewport_mem_outbound(pp); } else { dw_pcie_prog_viewport_cfg1(pp, busdev); ret = dw_pcie_cfg_read(pp->va_cfg1_base + address, where, size, @@ -703,7 +705,9 @@ static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, dw_pcie_prog_viewport_cfg0(pp, busdev); ret = dw_pcie_cfg_write(pp->va_cfg0_base + address, where, size, val); - dw_pcie_prog_viewport_mem_outbound(pp); + if (!IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS) + && !IS_ENABLED(CONFIG_RC_MODE_IN_EP_RC_SYS)) + dw_pcie_prog_viewport_mem_outbound(pp); } else { dw_pcie_prog_viewport_cfg1(pp, busdev); ret = dw_pcie_cfg_write(pp->va_cfg1_base + address, where, size, |