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authorBai Ping <b51503@freescale.com>2015-08-06 03:37:44 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-14 10:55:13 -0600
commitafde4fa8fceeaa4820f4fed791e11a3c60282a7f (patch)
tree88cdccc7fa88a4c25a37cbedd5e8ce01276212bb
parente1440f956bc0f0453f859a7926390efb17e8d892 (diff)
MLK-11322-01 ARM: dts: imx: add ocram node used for lpm code
Reserve iram space for low power code. The first 16KB space is used for suspend/resume and cpuidle. Another 4KB space is for busfreq code. for i.MX6SX, it has a dedicated ocram space start at 0x8f8000 for low power code. Signed-off-by: Bai Ping <b51503@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi16
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi20
5 files changed, 49 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index f94bf72832af..b2bca911c9bc 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -60,9 +60,9 @@
};
soc {
- ocram: sram@00900000 {
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00905000 0x1B000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 399103b8e2c9..7b4187baf340 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -78,9 +78,9 @@
};
soc {
- ocram: sram@00900000 {
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x40000>;
+ reg = <0x00905000 0x3B000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index aa23ba617bf3..6c99ab643a97 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -119,6 +119,18 @@
status = "disabled";
};
+ ocrams: sram@00900000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x00900000 0x4000>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ ocrams_ddr: sram@00904000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00904000 0x1000>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
timer@00a00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 320a27f8889e..f39c35c829e5 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -99,9 +99,21 @@
interrupt-parent = <&gpc>;
ranges;
- ocram: sram@00900000 {
+ ocrams: sram@00900000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x00900000 0x4000>;
+ clocks = <&clks IMX6SL_CLK_OCRAM>;
+ };
+
+ ocrams_ddr: sram@00904000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00904000 0x1000>;
+ clocks = <&clks IMX6SL_CLK_OCRAM>;
+ };
+
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00905000 0x1B000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index e391d636f18e..f5f51fdacf30 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -141,8 +141,26 @@
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
};
- ocram: sram@00900000 {
+ ocrams: sram@008f8000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x008f8000 0x4000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM_S>;
+ };
+
+ ocrams_ddr: sram@00900000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00900000 0x1000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM>;
+ };
+
+ ocram: sram@00901000 {
compatible = "mmio-sram";
+ reg = <0x00901000 0x1F000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM>;
+ };
+
+ ocram_mf: sram-mf@00900000 {
+ compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x20000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};