diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2017-11-20 21:27:49 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-11-27 10:12:38 +0100 |
| commit | 4bc835895a461a17387b52a8229a4b7a4a52d982 (patch) | |
| tree | 6a2c15878ab0e2448e2cd2be9b760495e80ab5bb | |
| parent | 8d5f3e4f71972bca32b80889f2787942c7e3ed1f (diff) | |
arm: dts: imx6ull: fix pwm clock
All PWM clock instances have their clock gate. Add these consistently.
Fixes freezing the kernel when one of these instances is used with
IMX6UL_CLK_DUMMY as its clock source.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index fdf8ebd7af05..5565ecbe24b3 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -445,8 +445,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM2>, + <&clks IMX6UL_CLK_PWM2>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -465,8 +465,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM4>, + <&clks IMX6UL_CLK_PWM4>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -796,8 +796,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f0000 0x4000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM5>, + <&clks IMX6UL_CLK_PWM5>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -806,8 +806,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f4000 0x4000>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM6>, + <&clks IMX6UL_CLK_PWM6>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -816,8 +816,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f8000 0x4000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM7>, + <&clks IMX6UL_CLK_PWM7>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -826,8 +826,8 @@ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020fc000 0x4000>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; + clocks = <&clks IMX6UL_CLK_PWM8>, + <&clks IMX6UL_CLK_PWM8>; clock-names = "ipg", "per"; #pwm-cells = <2>; }; |