summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPhilippe Schenker <philippe.schenker@toradex.com>2019-07-12 12:57:04 +0200
committerPhilippe Schenker <philippe.schenker@toradex.com>2019-08-06 10:06:13 +0200
commitdb8bf28f95054d4e1938e211d3abd60dedbe60ac (patch)
tree350e6e4b712f1d8ed2d301257e936f17802f9bf3
parenta75383e2d55be14bca16e8e4a0c43359f49a5648 (diff)
ARM64: dts: colibri-imx8x: Add sleep state and disable-wp to usdhc2
This commit adds proper sleep state muxing, needed for carrier boards that have a vmmc switch in there so we can prevent backfeeding. Disabling write protection as this pin is not routed. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi
index ab324404e2d4..93340d148835 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi
@@ -656,6 +656,12 @@
>;
};
+ pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
+ fsl,pins = <
+ SC_P_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */
+ >;
+ };
+
/* Colibri SDCard */
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
@@ -693,6 +699,18 @@
>;
};
+ pinctrl_usdhc2_sleep: usdhc2slpgrp {
+ fsl,pins = <
+ SC_P_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */
+ SC_P_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */
+ SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */
+ SC_P_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */
+ SC_P_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */
+ SC_P_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */
+ SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
+ >;
+ };
+
/* On-module MIPI DSI I2C accessible on FFC (X2) */
pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
fsl,pins = <
@@ -980,10 +998,12 @@
bus-width = <4>;
cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_module_3v3>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
+ disable-wp;
status = "okay";
};