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authorPhilippe Schenker <philippe.schenker@toradex.com>2020-01-30 17:38:11 +0100
committerPhilippe Schenker <philippe.schenker@toradex.com>2020-01-31 14:07:56 +0100
commit4978fb7558a68606f484d164cb4354590c3aac18 (patch)
tree0c2402dd34a27bf8e5fad21cd6704c3bf68f81da
parent2fb45c7ffabed7f110602e0bc7832277c93ad929 (diff)
ARM64: dts: apalis-imx8qm: add power-domain to power down ETH PHY
Related-to: ELB-1254 Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi
index 8ed8a64..9578db8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi
@@ -38,6 +38,31 @@
};
};
+ imx8qm-pm {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pd_3v3_brd_scfw: PD_3V3LDO1 {
+ compatible = "nxp,imx8-pd";
+ reg = <SC_R_NONE>;
+ #power-domain-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pd_3v3_eth: PD_3V3ETH {
+ reg = <SC_R_BOARD_R0>;
+ #power-domain-cells = <0>;
+ power-domains = <&pd_3v3_brd_scfw>;
+ };
+ };
+ };
+
+ /* Power management bus used for powering down phy in suspend */
+ pmbus {
+ compatible = "simple-pm-bus";
+ power-domains = <&pd_3v3_eth>;
+ };
+
pcie_sata_refclk: clock-generator {
compatible = "fixed-clock";
#clock-cells = <0>;