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authorQuan Zhang <spring.zhang@nxp.com>2016-09-06 03:34:24 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:24:57 +0800
commit4a103104962390eaafeceb26422300b6f137817d (patch)
tree6425d3254479b6a3dd7f12337b0ed60d917e57f1
parentdd194a1e241a08220d0914d710c42c3d298a2d96 (diff)
MLK-13206 dcp: mx6sl: add missing components in dts
After MX6ULL DCP issue is fixed in commit 7a1cc1f, it introduces a new issue, MX6SL will meet issue as no dcp clock is defined when initializing: [ 3.061344] mxs-dcp 20fc000.dcp: can't identify DCP clk: -2 On mx6sl, dcp clock is always on, so the patch use dummy as dcp clock directly. Signed-off-by: Quan Zhang <spring.zhang@nxp.com>
-rw-r--r--Documentation/devicetree/bindings/crypto/fsl-dcp.txt2
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi4
2 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
index 76a0b4e80e83..9c2ef99e8ab3 100644
--- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
@@ -10,7 +10,7 @@ Required properties:
Example:
dcp@80028000 {
- compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
+ compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp", "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <52 53>;
};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 21a51597020d..d971b965acf6 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -836,6 +836,10 @@
interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
<0 100 IRQ_TYPE_LEVEL_HIGH>,
<0 101 IRQ_TYPE_LEVEL_HIGH>;
+ /* DCP clock always on */
+ clocks = <&clks IMX6SL_CLK_DUMMY>;
+ clock-names = "dcp";
+ status = "okay";
};
};