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author | Max Krummenacher <max.krummenacher@toradex.com> | 2020-11-10 09:45:10 +0100 |
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committer | Max Krummenacher <max.krummenacher@toradex.com> | 2020-11-10 19:03:46 +0100 |
commit | 3f945d0d10f0ce2d6d84d336abf52470794770d6 (patch) | |
tree | 36f5d3e0c53715bcc8ace7990b8d73a118ec45f2 | |
parent | 33452eabb6d5b300c36d37252c7561a1eb129478 (diff) |
arm64: dts: apalis-imx8: enable vpu mailboxes
The VPU subsystem uses hardware Messaging Units (MU) for inter processor
communication with the controlling OS. The driver for the MU is implemented
as a Linux mailbox.
Enable the VPU MU in the device-tree.
Related-to: ELB-3196
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi index ab22a642be68..63e3341a677e 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -1531,6 +1531,24 @@ "MXM3_243"; }; +&mu_m0{ + interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mu1_m0{ + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mu2_m0{ + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + +&mu3_m0{ + interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + /* Apalis PCIE1 */ &pciea { pinctrl-names = "default"; |