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authorStefan Agner <stefan.agner@toradex.com>2016-11-10 15:56:18 -0800
committerStefan Agner <stefan.agner@toradex.com>2016-11-10 15:56:18 -0800
commit84f84c490be146cb6078a0d31816a0a8e50022c6 (patch)
treea327548baba9d1bfc7ede6caff28bd0ec23e685a
parent3c8a32b891954ba6841797c6b8e55569a5fabfc7 (diff)
ARM: imx: adjust vring location to be at 256MB boundary
The VirtIO vring descriptors are currently at the end of the 1024MiB boundary of DDR memory 0xbfff8000. For the Colibri iMX7S and iMX7D this is outside of the addressable DDR memory. In practise VirtIO still worked because when accessing memory at out-of-bound addresses it usually just accesses memory from lower addresses (most significant address line is ignored). However, we should not rely on that behavior. Move the hardcoded vring to the end of the 256MiB boundary at 0x8fff0000. Note: This needs a Cortex-M4 firmware which uses the same hardcoded vring address. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
-rw-r--r--arch/arm/mach-imx/imx_rpmsg.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/imx_rpmsg.c b/arch/arm/mach-imx/imx_rpmsg.c
index 6e3aed1e2cb4..440d0437de75 100644
--- a/arch/arm/mach-imx/imx_rpmsg.c
+++ b/arch/arm/mach-imx/imx_rpmsg.c
@@ -290,8 +290,8 @@ static int imx_rpmsg_probe(struct platform_device *pdev)
ret |= of_device_is_compatible(np, "fsl,imx6sx-rpmsg");
if (ret) {
/* hardcodes here now. */
- rpdev->vring[0] = 0xBFFF0000;
- rpdev->vring[1] = 0xBFFF8000;
+ rpdev->vring[0] = 0x8FFF0000;
+ rpdev->vring[1] = 0x8FFF8000;
}
} else {
break;