summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFugang Duan <fugang.duan@nxp.com>2017-11-21 13:56:50 +0800
committerFugang Duan <fugang.duan@nxp.com>2017-11-21 16:29:01 +0800
commitc4e7ffe25d82af411c5e9cfc24e531c220fabfae (patch)
tree8f93e12f44ee8912fdc2dfc6b62c9ddcd36fa998
parentdfad707edb70f8a0adab0e50c4a5a8245b49980b (diff)
MLK-16896 tty: serial: lpuart: flush transmit/receive fifo/buffer
Although .startup() alreadly do transmit/receive fifo/buffer flush, but switch the baud rate may introduce dirty data on fifo, in such case, user will call tcflush() to clean up buffer and fifo. So driver also ensure HW fifo is cleaned up. The patch add hw fifo/buffer flush in .flush_buffer() callback. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
-rw-r--r--drivers/tty/serial/fsl_lpuart.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 68200cad1266..3971bc0b0231 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -480,6 +480,8 @@ static int lpuart_dma_tx_request(struct uart_port *port)
static void lpuart_flush_buffer(struct uart_port *port)
{
struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
+ u32 val;
+
if (sport->lpuart_dma_tx_use) {
if (sport->dma_tx_in_progress) {
dma_unmap_sg(sport->port.dev, &sport->tx_sgl[0],
@@ -488,6 +490,16 @@ static void lpuart_flush_buffer(struct uart_port *port)
}
dmaengine_terminate_all(sport->dma_tx_chan);
}
+
+ if (sport->lpuart32) {
+ val = lpuart32_read(sport->port.membase + UARTFIFO);
+ val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH;
+ lpuart32_write(val, sport->port.membase + UARTFIFO);
+ } else {
+ val = readb(sport->port.membase + UARTPFIFO);
+ val |= UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH;
+ writeb(val, sport->port.membase + UARTCFIFO);
+ }
}
static inline void lpuart_transmit_buffer(struct lpuart_port *sport)