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authorOleksandr Suvorov <oleksandr.suvorov@toradex.com>2019-05-03 11:10:48 +0300
committerOleksandr Suvorov <oleksandr.suvorov@toradex.com>2019-05-03 12:41:04 +0300
commit86f4255fada1bced6265ca7db5268be9656b35c6 (patch)
tree1f3858a574a3adac1552f678a62d4927b6e30f7c
parent6b01f0b022ab56acfe85a0f7f9ce0a9f25b863d4 (diff)
ASoC: sgtl5000: Fix setting power registers
- set VDDD voltage ONLY if use internal ldo regulator; - assign manually the source of charge pump ONLY if automatic selection can't perform. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
-rw-r--r--sound/soc/codecs/sgtl5000.c27
1 files changed, 13 insertions, 14 deletions
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index 7e802ed4d8fb..842cca0a2053 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -1117,27 +1117,26 @@ static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
SGTL5000_INT_OSC_EN);
/* Enable VDDC charge pump */
ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP;
- } else if (vddio >= 3100 && vdda >= 3100) {
- /*
- * if vddio and vddd > 3.1v,
- * charge pump should be clean before set ana_pwr
+ } else {
+ ana_pwr &= ~SGTL5000_VDDC_CHRGPMP_POWERUP;
+ /* if vddio == vdda the source of charge pump should be
+ * assigned manually to VDDIO
*/
- snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
- SGTL5000_VDDC_CHRGPMP_POWERUP, 0);
-
- /* VDDC use VDDIO rail */
- lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
- lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
- SGTL5000_VDDC_MAN_ASSN_SHIFT;
+ if (vddio == vdda) {
+ lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
+ lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
+ SGTL5000_VDDC_MAN_ASSN_SHIFT;
+ }
}
snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL, lreg_ctrl);
snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr);
- /* set voltage to register */
- snd_soc_update_bits(codec, SGTL5000_CHIP_LINREG_CTRL,
- SGTL5000_LINREG_VDDD_MASK, 0x8);
+ /* set voltage to 1.2V ONLY if VDDD is internally driven by the chip */
+ if (sgtl5000->ldo)
+ snd_soc_update_bits(codec, SGTL5000_CHIP_LINREG_CTRL,
+ SGTL5000_LINREG_VDDD_MASK, 0x8);
/*
* if vddd linear reg has been enabled,