diff options
| author | Kouei Abe <kouei.abe.cp@renesas.com> | 2014-11-12 17:55:56 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-11-19 09:22:12 +0900 |
| commit | 3e58a5424c8325df8b62f1de175dc95c7373bfe1 (patch) | |
| tree | ff5f693eb99479a53fabf4724de28c9c3432f4f2 | |
| parent | ce47481652106e955296651a1b76c0dd4561cfbc (diff) | |
ARM: shmobile: r8a7794: Add SGX clock to device tree
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r8a7794.dtsi | 11 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a7794-clock.h | 1 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 95f656d22fde..b6f8f451e3b1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -461,16 +461,15 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, - <&cp_clk>, - <&zs_clk>, <&zs_clk>, <&zs_clk>; + clocks = <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, + <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7794_CLK_TMU1 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 - R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 + R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_TMU3 + R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 >; clock-output-names = - "tmu1", "tmu3", "tmu2", "cmt0", "tmu0"; + "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index fd7cdee6a666..9066213f5a96 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -27,6 +27,7 @@ /* MSTP1 */ #define R8A7794_CLK_TMU1 11 +#define R8A7794_CLK_3DG 12 #define R8A7794_CLK_TMU3 21 #define R8A7794_CLK_TMU2 22 #define R8A7794_CLK_CMT0 24 |