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authorLaxman Dewangan <ldewangan@nvidia.com>2010-09-30 20:57:35 +0530
committerBharat Nihalani <bnihalani@nvidia.com>2010-10-02 03:21:19 -0700
commita12c04e6a12dcc53ccc3811891a49c78ad397030 (patch)
tree016d841770619eaa7ca16f567a4bc2e44d9d7c60
parentf43c0a944108bc1e50ac39f24e1187ce379376b7 (diff)
[arm/tegra] pmc: Overriding only kbc pins during suspend.tegra-10.9.2
To enable dpd override of the kbc pins during suspend, it needs to write into dpd override register. By mistake, it was also resetting the other configuration bits. Fixing this issue. bug 739052 Change-Id: I06cf4a7252157418a4789281a79f79946d7f2bdc Reviewed-on: http://git-master/r/7500 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/suspend.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c
index a721a93dba6e..baa873bc0fc7 100644
--- a/arch/arm/mach-tegra/suspend.c
+++ b/arch/arm/mach-tegra/suspend.c
@@ -801,6 +801,12 @@ void __init tegra_init_suspend(struct tegra_suspend_platform_data *plat)
#ifdef CONFIG_PM
void tegra_configure_dpd_kbc(unsigned int kbc_rows, unsigned int kbc_cols)
{
- writel((kbc_rows & 0xFFFF), pmc + PMC_DPAD_ORIDE);
+ unsigned long dpd_oride;
+
+ /* Only need to configure the enabled rows */
+ dpd_oride = readl(pmc + PMC_DPAD_ORIDE);
+ dpd_oride &= 0x00300000;
+ dpd_oride |= (kbc_rows & 0xFFFF);
+ writel(dpd_oride, pmc + PMC_DPAD_ORIDE);
}
#endif