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authorVarun Wadekar <vwadekar@nvidia.com>2011-07-27 11:53:12 +0530
committerSimone Willett <swillett@nvidia.com>2011-08-09 13:22:29 -0700
commit0ee38bb7f7b6720b6c0627a9cf8c334678066d8d (patch)
tree796e04556cd4abb80cf06b214d5ecf6cddf122b3
parenta714dd55c49e16173f7cff264ac58b5cbd6c0942 (diff)
ARM: tegra: ventana: nvidia memory table updates to prevent corruption
To avoid memory corruption when device is operating at full temperature QUSE_EXTRA should always be set to 0 for frequencies 150MHz and less. As extra protection change FBIO_CFG5 to remove the region where there is TriState on the DQS signals thus preventing false DQS pulses (and false reads). (cherry-picked from 2dc075be0e8495654a84a6bc6afa63408e141b02) Original author: James Wylder <james.wylder@motorola.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I5c711343737edf972251006484ea84661106e0f9 Reviewed-on: http://git-master/r/43401 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-ventana-memory.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-memory.c b/arch/arm/mach-tegra/board-ventana-memory.c
index 1adcd8b20d71..8c207b700bcd 100644
--- a/arch/arm/mach-tegra/board-ventana-memory.c
+++ b/arch/arm/mach-tegra/board-ventana-memory.c
@@ -59,11 +59,11 @@ static const struct tegra_emc_table ventana_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000068, /* TREFBW */
- 0x00000003, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000003, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -110,11 +110,11 @@ static const struct tegra_emc_table ventana_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x000000d0, /* TREFBW */
- 0x00000004, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000000, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -161,11 +161,11 @@ static const struct tegra_emc_table ventana_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000138, /* TREFBW */
- 0x00000004, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000000, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -216,7 +216,7 @@ static const struct tegra_emc_table ventana_emc_tables_elpida_300Mhz[] = {
0x00000001, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xA04C04AE, /* CFG_DIG_DLL */
0x007FC010, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */