diff options
authorMaciej W. Rozycki <>2017-06-16 00:07:34 +0100
committerGreg Kroah-Hartman <>2017-07-27 15:08:04 -0700
commit040078ad0fe82beff150dfd3b060a2ba7b47ea37 (patch)
parent434c9f2e3b4667859a705b48d53f23f5f629ecf1 (diff)
MIPS: Fix unaligned PC interpretation in `compute_return_epc'
commit 11a3799dbeb620bf0400b1fda5cc2c6bea55f20a upstream. Fix a regression introduced with commit fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") and defer to `__compute_return_epc' if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware, which will then arrange for a SIGBUS due to an unaligned instruction reference. Returning EPC here is never correct as the API defines this function's result to be either a negative error code on failure or one of 0 and BRANCH_LIKELY_TAKEN on success. Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") Signed-off-by: Maciej W. Rozycki <> Cc: James Hogan <> Cc: Patchwork: Signed-off-by: Ralf Baechle <> Signed-off-by: Greg Kroah-Hartman <>
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/mips/include/asm/branch.h b/arch/mips/include/asm/branch.h
index de781cf54bc7..da80878f2c0d 100644
--- a/arch/mips/include/asm/branch.h
+++ b/arch/mips/include/asm/branch.h
@@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs)
return __microMIPS_compute_return_epc(regs);
if (cpu_has_mips16)
return __MIPS16e_compute_return_epc(regs);
- return regs->cp0_epc;
- }
- if (!delay_slot(regs)) {
+ } else if (!delay_slot(regs)) {
regs->cp0_epc += 4;
return 0;