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authorMaciej W. Rozycki <>2017-06-16 00:06:19 +0100
committerGreg Kroah-Hartman <>2017-07-27 15:08:04 -0700
commit434c9f2e3b4667859a705b48d53f23f5f629ecf1 (patch)
parentf8c331cbc937d849d93dc9f3f7cdc31d5fbac58e (diff)
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
commit a9db101b735a9d49295326ae41f610f6da62b08c upstream. Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") and actually decode the regular MIPS JALX major instruction opcode, the handling of which has been added with the said commit for EPC calculation in `__compute_return_epc_for_insn'. Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") Signed-off-by: Maciej W. Rozycki <> Cc: James Hogan <> Cc: Patchwork: Signed-off-by: Ralf Baechle <> Signed-off-by: Greg Kroah-Hartman <>
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index c86b66b57fc6..62806db073d2 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -556,6 +556,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
* These are unconditional and in j_format.
+ case jalx_op:
case jal_op:
regs->regs[31] = regs->cp0_epc + 8;
case j_op: