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authorDominik Sliwa <dominik.sliwa@toradex.com>2017-10-17 13:39:23 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-10-17 15:07:26 +0200
commit5ed678c0982f3b611c09a4830e81672fa87372b8 (patch)
tree47af9764f17e4465a8e13f636841b1898899c9a0
parente9636255d1a151de8903e952f64ed779e832f613 (diff)
ARM: tegra: apalis-tk1: use high vil/vih receivers for ddc
DDC/EDID detection was failing on Apalis TK1 V1.2A on Ixora. Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r--arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi
index d49673f..d7f5a6c 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi
@@ -247,6 +247,7 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
};
ddc_sda_pv5 {
nvidia,pins = "ddc_sda_pv5";
@@ -254,6 +255,7 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
};
/* Apalis MMC1 */