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authorJianqun Xu <jay.xu@rock-chips.com>2016-02-23 15:01:01 +0800
committerHeiko Stuebner <heiko@sntech.de>2016-03-27 00:54:13 +0100
commitfe95effb4c381355e38f5bffced4917a2b6dc7d3 (patch)
tree827e472f5c9d99d21a1db12a4919c049fccab766 /Documentation/devicetree/bindings/soc
parent1946a201b3963b78a9e2123aedbdd11c4c4849dd (diff)
dt-bindings: add bindings for Rockchip grf
Add devicetree bindings for Rockchip grf which found on Rockchip SoCs. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r--Documentation/devicetree/bindings/soc/rockchip/grf.txt35
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diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
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+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on system
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+ - "rockchip,rk3066-grf", "syscon": for rk3066
+ - "rockchip,rk3188-grf", "syscon": for rk3188
+ - "rockchip,rk3228-grf", "syscon": for rk3228
+ - "rockchip,rk3288-grf", "syscon": for rk3288
+ - "rockchip,rk3368-grf", "syscon": for rk3368
+ - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+ - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+ - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+ pmugrf: syscon@ff320000 {
+ compatible = "rockchip,rk3399-pmugrf", "syscon";
+ reg = <0x0 0xff320000 0x0 0x1000>;
+ };
+
+ grf: syscon@ff770000 {
+ compatible = "rockchip,rk3399-grf", "syscon";
+ reg = <0x0 0xff770000 0x0 0x10000>;
+ };