diff options
| author | Hua Jing <jinghua@marvell.com> | 2017-03-09 18:52:56 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-03-17 13:32:59 +0900 |
| commit | 356c50079b96e5947db4a974da620cd2c4b20e9e (patch) | |
| tree | e9254c550bf0cddbc2544dc361efe1bef0954c8e /Documentation/devicetree/bindings/usb | |
| parent | 8d66db50b2ac9dbf5cca9ede64f1c859d7b86eb6 (diff) | |
usb: orion-ehci: Add support for the Armada 3700
- Add a new compatible string for the Armada 3700 SoCs
- add sbuscfg support for orion usb controller driver. For the SoCs
without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
register to guarantee the AHB master's burst would not overrun or
underrun the FIFO.
- the sbuscfg register has to be set after the usb controller reset,
otherwise the value would be overridden to 0. In order to do this, the
reset callback is registered.
[gregory.clement@free-electrons.com: - reword commit and comments
- fix error path in ehci_orion_drv_reset()
- fix checkpatch warning]
Signed-off-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/usb')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/ehci-orion.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt index 17c3bc858b86..2855bae79fda 100644 --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt +++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt @@ -1,7 +1,9 @@ * EHCI controller, Orion Marvell variants Required properties: -- compatible: must be "marvell,orion-ehci" +- compatible: must be one of the following + "marvell,orion-ehci" + "marvell,armada-3700-ehci" - reg: physical base address of the controller and length of memory mapped region. - interrupts: The EHCI interrupt |