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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-19 09:45:31 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-19 09:45:31 -0500
commitf17a6f78595e52761b7b2dece8c11b04b65f19dd (patch)
treec83b5598d14050ae61a784277573b694f1fb4b67 /Documentation
parent7ac0bbf99d44c827c88aa7a9064050526e723ebb (diff)
parent981c191778a4f92bc82456205a444d522843a630 (diff)
Merge tag 'pci-v3.17-changes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas: "Marvell MVEBU - Remove ARCH_KIRKWOOD dependency (Andrew Lunn) NVIDIA Tegra - Add debugfs support (Thierry Reding) Synopsys DesignWare - Look for configuration space in 'reg', not 'ranges' (Kishon Vijay Abraham I) - Program ATU with untranslated address (Kishon Vijay Abraham I) - Add config access-related pcie_host_ops for v3.65 hardware (Murali Karicheri) - Add MSI-related pcie_host_ops for v3.65 hardware (Murali Karicheri) TI DRA7xx - Add TI DR7xx PCIe driver (Kishon Vijay Abraham I)" * tag 'pci-v3.17-changes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: designware: Add MSI-related pcie_host_ops for v3.65 hardware PCI: designware: Add config access-related pcie_host_ops for v3.65 hardware PCI: dra7xx: Add TI DRA7xx PCIe driver PCI: designware: Program ATU with untranslated address PCI: designware: Look for configuration space in 'reg', not 'ranges' PCI: tegra: Add debugfs support PCI: mvebu: Remove ARCH_KIRKWOOD dependency
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/designware-pcie.txt4
-rw-r--r--Documentation/devicetree/bindings/pci/ti-pci.txt59
2 files changed, 63 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index d0d15ee42834..ed0d9b9fff2b 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -2,6 +2,10 @@
Required properties:
- compatible: should contain "snps,dw-pcie" to identify the core.
+- reg: Should contain the configuration address space.
+- reg-names: Must be "config" for the PCIe configuration space.
+ (The old way of getting the configuration address space from "ranges"
+ is deprecated and should be avoided.)
- #address-cells: set to <3>
- #size-cells: set to <2>
- device_type: set to "pci"
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
new file mode 100644
index 000000000000..3d217911b313
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -0,0 +1,59 @@
+TI PCI Controllers
+
+PCIe Designware Controller
+ - compatible: Should be "ti,dra7-pcie""
+ - reg : Two register ranges as listed in the reg-names property
+ - reg-names : The first entry must be "ti-conf" for the TI specific registers
+ The second entry must be "rc-dbics" for the designware pcie
+ registers
+ The third entry must be "config" for the PCIe configuration space
+ - phys : list of PHY specifiers (used by generic PHY framework)
+ - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
+ number of PHYs as specified in *phys* property.
+ - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
+ where <X> is the instance number of the pcie from the HW spec.
+ - interrupts : Two interrupt entries must be specified. The first one is for
+ main interrupt line and the second for MSI interrupt line.
+ - #address-cells,
+ #size-cells,
+ #interrupt-cells,
+ device_type,
+ ranges,
+ num-lanes,
+ interrupt-map-mask,
+ interrupt-map : as specified in ../designware-pcie.txt
+
+Example:
+axi {
+ compatible = "simple-bus";
+ #size-cells = <1>;
+ #address-cells = <1>;
+ ranges = <0x51000000 0x51000000 0x3000
+ 0x0 0x20000000 0x10000000>;
+ pcie@51000000 {
+ compatible = "ti,dra7-pcie";
+ reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
+ reg-names = "rc_dbics", "ti_conf", "config";
+ interrupts = <0 232 0x4>, <0 233 0x4>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x03000 0 0x00010000
+ 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
+ #interrupt-cells = <1>;
+ num-lanes = <1>;
+ ti,hwmods = "pcie1";
+ phys = <&pcie1_phy>;
+ phy-names = "pcie-phy0";
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 1>,
+ <0 0 0 2 &pcie_intc 2>,
+ <0 0 0 3 &pcie_intc 3>,
+ <0 0 0 4 &pcie_intc 4>;
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+ };
+};