diff options
author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-02-11 15:42:48 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:16:45 -0600 |
commit | 75ce9adb64364b349685fe5f94817722e4495477 (patch) | |
tree | ea676ee7e7e18935a1ac5e5e60af9aa783bae59a /Documentation | |
parent | 7cca1985f4dad0aa35bcdc21125bd974e2ad0b27 (diff) |
ASoC: fsl-spdif: big-endian support
For most platforms, the CPU and SPDIF device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the SPDIF
is in BE mode.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 86f28d76435b619bd0bc5f6fde2803a5bc27ca24)
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/sound/fsl,spdif.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.txt b/Documentation/devicetree/bindings/sound/fsl,spdif.txt index f2ae335670f5..3e9e82c8eab3 100644 --- a/Documentation/devicetree/bindings/sound/fsl,spdif.txt +++ b/Documentation/devicetree/bindings/sound/fsl,spdif.txt @@ -29,6 +29,10 @@ Required properties: can also be referred to TxClk_Source bit of register SPDIF_STC. + - big-endian : If this property is absent, the native endian mode will + be in use as default, or the big endian mode will be in use for all the + device registers. + Example: spdif: spdif@02004000 { @@ -50,5 +54,6 @@ spdif: spdif@02004000 { "rxtx5", "rxtx6", "rxtx7"; + big-endian; status = "okay"; }; |