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authorHarini Katakam <harinik@xilinx.com>2014-04-11 12:06:28 +0530
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:18:59 -0600
commit95cec62006b377634d788d4cca286e46f4dfd54c (patch)
tree0194c40be2eddd1c44ffcf18aad1d15895614df1 /Documentation
parent120434f20a10ee4e6542d2c986e6faf701368d10 (diff)
spi: core: Increase timeout value
The existing timeout value in wait_for_completion_timeout is calculated from the transfer length and speed with tolerance of 10msec. This is too low because this is used for error conditions such as hardware hang etc. The xfer->speed_hz considered may not be the actual speed set because the best clock divisor is chosen from a limited set such that the actual speed <= requested speed. This will lead to timeout being less than actual transfer time. Considering acceptable latencies, this timeout can be set to a value double the expected transfer plus 100 msecs. This patch adds the same in the core. Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit eee668a92bc775030178c8a7f0d0abe9cce441d7) (cherry picked from commit e123573ecd0b16f52998e731a0659fdc89d841e4)
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