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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:42:53 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:42:53 -0800
commit0beb58783f2168354e2b5297af45fc7db70adf12 (patch)
tree4debaf4f276990adf1892b7efe57edd344367464 /Documentation
parent6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a (diff)
parenteabc5fa51c1fae4b66cf883e3a3c2b3ca794494c (diff)
Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device-tree updates, take 2, from Olof Johansson: "This branch contains device-tree updates for the SPEAr platform. They had dependencies on earlier branches from this merge window, which is why they were broken out in a separate branch." * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/ ARM: SPEAr320: DT: Add SPEAr 320 HMI board support ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT ARM: SPEAr1310: Fix AUXDATA for compact flash controller ARM: SPEAr13xx: Remove fields not required for ssp controller ARM: SPEAr1310: Move 1310 specific misc register into machine specific files ARM: SPEAr: DT: Update device nodes ARM: SPEAr: DT: add uart state to fix warning ARM: SPEAr: DT: Modify DT bindings for STMMAC ARM: SPEAr: DT: Fix existing DT support ARM: SPEAr: DT: Update partition info for MTD devices ARM: SPEAr: DT: Update pinctrl list ARM: SPEAr13xx: DT: Add spics gpio controller nodes
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/spear/shirq.txt48
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+* SPEAr Shared IRQ layer (shirq)
+
+SPEAr3xx architecture includes shared/multiplexed irqs for certain set
+of devices. The multiplexor provides a single interrupt to parent
+interrupt controller (VIC) on behalf of a group of devices.
+
+There can be multiple groups available on SPEAr3xx variants but not
+exceeding 4. The number of devices in a group can differ, further they
+may share same set of status/mask registers spanning across different
+bit masks. Also in some cases the group may not have enable or other
+registers. This makes software little complex.
+
+A single node in the device tree is used to describe the shared
+interrupt multiplexor (one node for all groups). A group in the
+interrupt controller shares config/control registers with other groups.
+For example, a 32-bit interrupt enable/disable config register can
+accommodate upto 4 interrupt groups.
+
+Required properties:
+ - compatible: should be, either of
+ - "st,spear300-shirq"
+ - "st,spear310-shirq"
+ - "st,spear320-shirq"
+ - interrupt-controller: Identifies the node as an interrupt controller.
+ - #interrupt-cells: should be <1> which basically contains the offset
+ (starting from 0) of interrupts for all the groups.
+ - reg: Base address and size of shirq registers.
+ - interrupts: The list of interrupts generated by the groups which are
+ then connected to a parent interrupt controller. Each group is
+ associated with one of the interrupts, hence number of interrupts (to
+ parent) is equal to number of groups. The format of the interrupt
+ specifier depends in the interrupt parent controller.
+
+ Optional properties:
+ - interrupt-parent: pHandle of the parent interrupt controller, if not
+ inherited from the parent node.
+
+Example:
+
+The following is an example from the SPEAr320 SoC dtsi file.
+
+shirq: interrupt-controller@0xb3000000 {
+ compatible = "st,spear320-shirq";
+ reg = <0xb3000000 0x1000>;
+ interrupts = <28 29 30 1>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+};