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authorRichard Zhu <r65037@freescale.com>2013-08-14 12:15:38 +0800
committerRichard Zhu <r65037@freescale.com>2013-08-29 10:27:09 +0800
commit84b1837655a1350b27fd1175b886aab620b5c222 (patch)
tree433ccc0f84c1f026aa9821746cf63d10be4684f3 /Documentation
parent71b80395ef844f983efd6a732c54e1e5d68ce6cb (diff)
ENGR00275213-1 arm: pcie: enable pcie on imx6 platforms
Add PCIe related clocks definitions and select pci on imx6 platforms toggle bit18 of grp1 fix pcie pm issue: Set bit18 of gpr1 before enter into supend, and clean it after resume, can fix the following errata. Errata ERR005723_PCIe PCIe does not support L2 Power Down. Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/imx6q-clock.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index dd8d8cfe4833..f53f2e5d34e8 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -220,6 +220,9 @@ clocks and IDs.
ldb_di0_div_sel 207
ldb_di1_div_sel 208
pll4_audio_div 209
+ lvds1_sel 210
+ lvds1_in 211
+ lvds1_out 212
Examples: