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author | Shengjiu Wang <b02247@freescale.com> | 2014-07-07 19:03:21 +0800 |
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committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:17:59 -0600 |
commit | 42325f2defd237dbd7dfd2200e0c8da61f1f1bde (patch) | |
tree | 4e50722b91449c67bda7085ab902e603be5de4ae /Documentation | |
parent | 2d0cc419474c35dfdec76b0363ff65c15fa103a2 (diff) |
ENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample Rate
The SRPC register should be volatile, LOCK bit is set by the hardware.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 35ac9096cbe158962e779fd9bc64aeb74abbc745)
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions