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authorAnson Huang <Anson.Huang@nxp.com>2018-08-10 15:45:00 +0800
committerJason Liu <jason.hui.liu@nxp.com>2018-10-29 11:10:38 +0800
commit81ecee43d728cd15a85cc7b21dc2d4ea69e27d83 (patch)
tree6d00a0a4a2de0aafec649bdf63f13752df2f12c2 /Documentation
parent482774fe46a74311b10d0867cf0a2c7ba009d6ce (diff)
MLK-19192 dt-bindings: imx8qm/imx8qxp: update pad definition
i.MX8QM/i.MX8QXP has pad type/definition change on B0, update binding doc accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com> (cherry picked from commit fd1e1f035e7cd2b0fd74549ba16172b5a10779cf)
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx8qm-pinctrl.txt18
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt18
2 files changed, 34 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8qm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8qm-pinctrl.txt
index 26fb0f8b0c02..68423ea288bc 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8qm-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8qm-pinctrl.txt
@@ -38,11 +38,27 @@ typedef union _hw_pad_iomux
uint32_t GP_ENB : 1; /*!< [30] GP write enable. */
uint32_t IFMUX_ENB : 1; /*!< [31] Mux write enable. */
} FDS0I28;
+ struct _hw_pad_iomux_28fdsoi_hsic
+ {
+ uint32_t DSE : 3; /*!< [2:0] Drive strength. */
+ uint32_t HYS : 1; /*!< [3] Hysteresis. */
+ uint32_t PUS : 2; /*!< [5:4] Pull-up select. */
+ uint32_t PKE : 1; /*!< [6] Pad keeper enable. */
+ uint32_t PUE : 1; /*!< [7] Pull-up enable. */
+ uint32_t _reserved2 : 11; /*!< [18:8] */
+ uint32_t WAKEUP : 3; /*!< [21:19] Wakeup controls. */
+ uint32_t WAKEUP_ENB : 1; /*!< [22] Wakeup write enable. */
+ uint32_t LPCONFIG : 2; /*!< [24:23] Low-power config. */
+ uint32_t CONFIG : 2; /*!< [26:25] Config. */
+ uint32_t IFMUX : 3; /*!< [29:27] Mux. */
+ uint32_t GP_ENB : 1; /*!< [30] GP write enable. */
+ uint32_t IFMUX_ENB : 1; /*!< [31] Mux write enable. */
+ } FDS0I28_HSIC;
struct _hw_pad_iomux_28fdsoi_comp
{
uint32_t COMPEN : 3; /*!< [2:0] Mode. */
uint32_t FASTFRZ : 1; /*!< [3] Fast freeze. */
- uint32_t _reserved1 : 1; /*!< [4] */
+ uint32_t PSW_OVR : 1; /*!< [4] 2.5 volt override */
uint32_t RASRCP : 4; /*!< [8:5] PMOS comp. */
uint32_t RASRCN : 4; /*!< [12:9] NMOS comp. */
uint32_t NASRC_SEL : 1; /*!< [13] Read NASRC select. */
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt
index d35b0d8ed51d..4ea92de8e1ca 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt
@@ -38,11 +38,27 @@ typedef union _hw_pad_iomux
uint32_t GP_ENB : 1; /*!< [30] GP write enable. */
uint32_t IFMUX_ENB : 1; /*!< [31] Mux write enable. */
} FDS0I28;
+ struct _hw_pad_iomux_28fdsoi_hsic
+ {
+ uint32_t DSE : 3; /*!< [2:0] Drive strength. */
+ uint32_t HYS : 1; /*!< [3] Hysteresis. */
+ uint32_t PUS : 2; /*!< [5:4] Pull-up select. */
+ uint32_t PKE : 1; /*!< [6] Pad keeper enable. */
+ uint32_t PUE : 1; /*!< [7] Pull-up enable. */
+ uint32_t _reserved2 : 11; /*!< [18:8] */
+ uint32_t WAKEUP : 3; /*!< [21:19] Wakeup controls. */
+ uint32_t WAKEUP_ENB : 1; /*!< [22] Wakeup write enable. */
+ uint32_t LPCONFIG : 2; /*!< [24:23] Low-power config. */
+ uint32_t CONFIG : 2; /*!< [26:25] Config. */
+ uint32_t IFMUX : 3; /*!< [29:27] Mux. */
+ uint32_t GP_ENB : 1; /*!< [30] GP write enable. */
+ uint32_t IFMUX_ENB : 1; /*!< [31] Mux write enable. */
+ } FDS0I28_HSIC;
struct _hw_pad_iomux_28fdsoi_comp
{
uint32_t COMPEN : 3; /*!< [2:0] Mode. */
uint32_t FASTFRZ : 1; /*!< [3] Fast freeze. */
- uint32_t _reserved1 : 1; /*!< [4] */
+ uint32_t PSW_OVR : 1; /*!< [4] 2.5 volt override */
uint32_t RASRCP : 4; /*!< [8:5] PMOS comp. */
uint32_t RASRCN : 4; /*!< [12:9] NMOS comp. */
uint32_t NASRC_SEL : 1; /*!< [13] Read NASRC select. */